4 Commits

Author SHA1 Message Date
Manorit Chawdhry
84610b66e1 arch: arm: dts: k3-j784s4-r5: Introduce k3-j784s4-r5.dtsi
Create an SoC R5 dtsi file that could be used at board level R5 files. This
would help in keeping the SoC level changes in sync across board files.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2024-10-30 13:02:04 -06:00
Manorit Chawdhry
8659144ae5 arm: dts: k3-*-r5: Add MPU clock in clocks property
MPU clock had been missing. Distinguish multiple clocks with clock-names
and add MPU clock as well.

Link: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html#clocks-for-a72ss0-core0-device
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
2024-10-21 17:52:31 -06:00
Jonathan Humphreys
9151844547 arch: arm: dts: k3-j784s4-r5-evm: Add missing fss range
Upstream DTS added explicit ranges to the fss node.  It did not include the
32 bit memory space needed by the R5 to access OSPI.  With the upstream DTS
sync, OSPI boot no longer works.

Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, this patch can be removed. See
f062a015f4 (arm64: dts: ti: k3-j784s4: Use exact ranges for FSS node)

Fixes: 5024a96db8e ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
2024-08-27 10:02:35 -06:00
Apurva Nandan
a0add1e62d arm: dts: Introduce j784s4 u-boot dts files
Introduce the base dts files needed for u-boot or to augment the linux
dtbs for use in the u-boot-spl and u-boot binaries.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
[ add binman and ddr dtsi files ]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
2024-03-04 13:41:03 -05:00