10 Commits

Author SHA1 Message Date
Tom Rini
d892702080 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-08 09:28:10 -06:00
Jonas Karlman
d4fd24ffe4 rockchip: rk3588: Migrate to OF_UPSTREAM
Migrate RK3588 boards that exists in Linux v6.8 to use OF_UPSTREAM.

Following targets is not migrated to use OF_UPSTREAM:
- generic-rk3588: Generic target only meant for U-Boot use
- toybrick-rk3588: Merged in v6.9-rc1

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:10 +08:00
Quentin Schulz
b9617d6e79 rockchip: rk3588: use DRAM banks from ATAGS
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.

The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.

Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-04-26 15:47:06 +08:00
Jonas Karlman
f3f0b8c357 rockchip: rk3588-edgeble-neu6: Enable FIT checksum validation
Enable SPL_FIT_SIGNATURE=y and LEGACY_IMAGE_FORMAT=y to validate FIT
images checksum in SPL.

Change to SPL_MAX_SIZE=0x40000 to allow SPL up to 256 KiB in size.

Enable SPL_DM_SEQ_ALIAS=y and SPL_PINCTRL=y to ensure eMMC and SD-card
pinctrl is configured in SPL.

Enable SYS_NS16550_MEM32=y to use readl/writel in serial driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-04-26 15:47:05 +08:00
Jonas Karlman
a74243c631 rockchip: rk3588: Drop REGULATOR_PWM Kconfig option
RK3588 boards do not have any pwm-regulator compatible nodes in DT, drop
the superfluous REGULATOR_PWM Kconfig options.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-04-26 15:47:04 +08:00
Jonas Karlman
b0cadb35da rockchip: Use common bss and stack addresses on RK3588
Currently the following memory layout is typically used on RK3588:
[    0, 256K) - SPL binary
[ 256K,   2M) - TF-A / reserved
[   -X,   4M) - SPL pre-reloc stack (SPL_STACK)
[ 3.5M,   4M)   - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[   -X,   6M) - SPL reloc stack (SPL_STACK_R_ADDR)
[   5M,   6M)   - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
[  10M,   +X) - U-Boot proper binary (TEXT_BASE)
[   -X,  12M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[11.5M,  12M)   - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[  64M, +16K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)

SPL can safely load U-Boot proper + FDT to [10M, 11.5M) with this layout.

However, on ROCK 5A the SPL stacks is overlapping:
[   -X,  16M) - SPL pre-reloc stack (SPL_STACK)
[15.5M,  16M)   - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[   -X,  16M) - SPL reloc stack (SPL_STACK_R_ADDR)
[  15M,  16M)   - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)

Because bind and probe udevice instanses is allocated on the pre-reloc
malloc heap, there is going to be an overlap when reloc malloc heap
reaches close to 512 KiB of usage.

Migrate to use common bss, stack and malloc heap size and addresses to
mitigate these limitations and allow for a larger U-Boot proper size.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Update for new boards defconfig)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 15:30:16 +08:00
Tom Rini
19f6576007 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-03-01 09:10:04 -05:00
Jonas Karlman
8ef97f8138 rockchip: rk3588: Enable eMMC HS200 mode
Writing to eMMC using HS200 mode work more reliably then other modes on
RK3588 boards.

Enable MMC_HS200_SUPPORT Kconfig option to prefer use of HS200 mode.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Weizhao Ouyang <o451686892@gmail.com>
2024-02-05 15:00:32 +08:00
Jonas Karlman
f1aa4cdfbf configs: rockchip: Enable ethernet driver on RK3588 boards
Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK3588 boards that
have an enabled gmac node and drop ETH_DESIGNWARE and GMAC_ROCKCHIP for
remaining RK3588 boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 16:49:41 +08:00
Jagan Teki
0a3a5746c3 board: rockchip: Add Edgeble Neural Compute Module 6B
Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module
based on Rockchip RK3588J from Edgeble AI.

Add support for this SoM and IO board.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:02 +08:00