8 Commits

Author SHA1 Message Date
Tom Rini
d892702080 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-08 09:28:10 -06:00
Jonas Karlman
7b00e7eb4c rockchip: rk356x: Migrate to OF_UPSTREAM
Migrate RK356x boards that exists in Linux v6.8 to use OF_UPSTREAM.

Following targets is not migrated to use OF_UPSTREAM:
- anbernic-rgxx3-rk3566: Multi device target
- generic-rk3568: Generic target only meant for U-Boot use
- pinetab2-rk3566: Merged in v6.9-rc1

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:10 +08:00
Quentin Schulz
f6114fb871 rockchip: rk356x: use DRAM banks from ATAGS
RK356x-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.

The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.

Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-04-26 15:47:06 +08:00
Jonas Karlman
8a94c376f6 rockchip: Use common bss and stack addresses on RK356x
Currently the following memory layout is typically used on RK356x:
[    0, 256K) - SPL binary
[ 256K,   2M) - TF-A / reserved
[   -X,   4M) - SPL pre-reloc stack (SPL_STACK)
[-128K,   4M)   - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[   -X,   6M) - SPL reloc stack (SPL_STACK_R_ADDR)
[   5M,   6M)   - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
[  10M,   +X) - U-Boot proper binary (TEXT_BASE)
[   -X,  12M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[-128K,  12M)   - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[  64M, +16K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)

SPL can safely load U-Boot proper + FDT to [10M, 12M-128K) with this
layout.

Migrate to use common bss, stack and malloc heap size and addresses to
remove this size limitation.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Update for pinetab2-rk3566_defconfig)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 15:28:09 +08:00
Tom Rini
db04ff42c7 mtd: Make CONFIG_MTD be the gate symbol for the menu
The help for CONFIG_MTD explains that it needs to be enabled for various
things like NAND, etc to be available. It however then doesn't enforce
this dependency and so if you have none of these systems present you
still need to disable a number of options. Fix this by making places
that select/imply one type of flash, but did not do the same, also do
this for "MTD". Make boards which hadn't been enabling MTD already but
need it now, do so. In a few places, disable CONFIG_CMD_MTDPARTS as it
wasn't previously enabled but was now being implied.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-01-22 14:18:54 -05:00
Tom Rini
42fb448a20 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-01-03 09:26:16 -05:00
Jonas Karlman
25f56459ae configs: rockchip: Enable ethernet driver on RK356x boards
Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK356x boards that
have an enabled gmac node.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 16:49:41 +08:00
Jonas Karlman
94da929b93 board: rockchip: Add Hardkernel ODROID-M1
Hardkernel ODROID-M1 is a single board computer with a RK3568B2 SoC,
a slightly modified version of the RK3568 SoC.

Features tested on a ODROID-M1 8GB v1.0 2022-06-13:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe/AHCI
- SATA port
- USB host

Device tree is imported from linux v6.4.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:03 +08:00