10735 Commits

Author SHA1 Message Date
Chris Packham
27b2488735 arm: mvebu: x240: Switch to standard boot
Use standard boot instead of the distro boot scripts. Regenerate the
board defconfig now that some options are selected automatically.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-11-26 13:20:00 +01:00
Tony Dinh
96ca314798 arm: kirkwood: Enable bootstd for Sheevaplug board
Enable bootstd for Sheevaplug board.
Remove JFFS2 support. See JFFS2 Vulnerability[1].
Enable LTO to keep board size within limit.
Move default envs to text-base environment

[1] https://lore.kernel.org/u-boot/20241114233005.GN3600562@bill-the-cat/T/#m2fc25da1d2c019bc3cd8676991fdd64b8a21aa9b

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-11-26 13:19:48 +01:00
Tony Dinh
325ac6c1e7 arm: mvebu: Disable JFFS2 support for Kirkwood and Armada XP boards
These boards don't use JFFS2 file system for booting so remove it.

Ref: https://lore.kernel.org/u-boot/20241114233005.GN3600562@bill-the-cat/T/#t
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Acked-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-11-26 13:19:42 +01:00
Guillaume La Roque
83a6ae6716 configs: khadas-vim3_android{_ab}: move on bootmeth android
Actually khadas vim3 use distro command to boot android image.
Move on new bootmeth android for A/B and non-A/B vim3 android.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Link: https://lore.kernel.org/r/20241126-adnroidv2-v4-4-11636106dc69@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-11-26 09:59:01 +01:00
Guillaume La Roque
86e931535c configs: khadas-vim3l_android{_ab}: move on bootmeth android
Actually khadas vim3l use distro command to boot android image.
Move on new bootmeth android for A/B and non-A/B vim3l android.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Link: https://lore.kernel.org/r/20241126-adnroidv2-v4-3-11636106dc69@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-11-26 09:59:01 +01:00
Guillaume La Roque
9ef8b3bf8a bootstd: android: add non-A/B image support
Update android bootmeth to support non-A/B image.
Enable AB support only when ANDROID_AB is enabled.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Link: https://lore.kernel.org/r/20241126-adnroidv2-v4-2-11636106dc69@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-11-26 09:59:01 +01:00
Yunus Bas
a488d9f26e board: phytec: phycore-imx8mm: Add EEPROM detection initialisation
Add EEPROM detection initialisation for phyCORE-i.MX8MM.

Signed-off-by: Yunus Bas <y.bas@phytec.de>
2024-11-25 23:08:24 -03:00
Christoph Stoidner
512c6b67a2 board: phytec: imx93: Add phyCORE-i.MX 93 support for all SOM variants
The phyCORE-i.MX 93 is available in various variants (e.g. different ram
sizes, eMMC HS400 yes/no). Enable hardware introspection for the
imx93-phyboard-segin_defconfig, so that during startup the SOM module
variant can be detected, and the hardware can be configured accordingly.
The resulting SPL and u-boot binary shall able to boot each
phyCORE-i.MX 93 module variant on each carrier board. Finally rename
imx93-phyboard-segin_defconfig to imx93-phycore_defconfig, to highlight
its SOM scope.

Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
2024-11-25 23:08:02 -03:00
Heiko Schocher
1d9c4c7fcb siemens: configs/capricorn_cxg3_defconfig: updates
make savedefconfig and add SCU_WDT and fix environment
offsets, as since silicon c0 the boot container takes place
at offset 0 and so the u-boot-env must be moved outside of
the boot container area.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
2024-11-25 23:07:37 -03:00
Enrico Leto
c8b3c46bde siemens: capricorn: move to cxg3 reference project with deneb board
We have many HW with capricorn i.MX8X boards. The difference in u-boot is
at all by the display of the LEDs.

* put upstream a reference project & board for DT and defconfig
* use the capricorn prefix outside the board/siemens/capricorn folder

Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
2024-11-25 23:07:37 -03:00
Heinrich Schuchardt
9c792ab336 configs: JH7110: enable EFI_LOADER_BOUNCE_BUFFER
Our MMC driver for JH7110 boards only supports reading to the low 4 GiB of
memory. Booting boards with more memory requires EFI_LOADER_BOUNCE_BUFFER.

Reported-by: E Shattow <lucent@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Loic Devulder <ldevulder@suse.com>
2024-11-23 23:37:00 +01:00
Tom Rini
35d5ad6cf2 Merge branch 'qcom-main' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/23474

- UFS support is enabled for SC7280 and SM8150 platforms.
- Qualcomm dt-bindings headers are all dropped in favour of
  dts/upstream.
- The SMMU driver now correctly handles stream ID 0 and is disabled in
  EL2.
- Initial support for capsule updates (using the new dynamic UUIDs) is
  added for the RB3 Gen 2 board alongside a new SCSI backend for DFU.
- CONFIG_PINCONF is enabled in qcom_defconfig.
- The vqmmc supply is now enabled for sdcard support on boards that need
  it.
- A quirk is added for reading GPIOs on the PM8550 PMIC
2024-11-20 11:55:24 -06:00
Caleb Connolly
e88089e4f1
qcom_defconfig: enable capsule update support
Enable all the necessary options for capsule updates to work, as well as
a few additional EFI features.

Capsule updates themselves are only enabled for the RB3 Gen 2, since the
exact details on where to flash U-Boot (or how to handle multiple boot
methods) has not been finalised for other boards.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-11-20 17:57:58 +01:00
Neil Armstrong
70cb7c239f
qcom_defconfig: enable UFS Qualcomm controller and PHY drivers
Now the Qualcomm controller and PHY drivers were accepted,
enable then in the qcom_defconfig file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-11-20 17:57:57 +01:00
Neil Armstrong
1ef0f64a68
qcom_defconfig: enable PINCONF
The SM8550 and SM8650 SoCs requires PINCONF to properly
setup SDC pins in order to function correctly.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-11-20 17:57:57 +01:00
Tom Rini
7fe55182d9 AMD/Xilinx changes for v2025.01-rc3
microblaze:
 - Disable JFFS2
 
 fpga:
 - pass compatible flag to fpga_load()
 
 zynqmp:
 - SOM RTC fix
 - SC(system controller) PMW polarity fix
 - Fix ram_top calculation with introducing XILINX_MINI
 - Fix RPU release command
 
 versal:
 - Enable capsule update
 - Enable soft reset and Micron octal flashes
 
 xilinx:
 - Align Kconfig regarding SPI_STACKED_PARALLEL
 
 bootcount:
 - Add new zynqmp driver
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZzyoqgAKCRDKSWXLKUoM
 IapRAJ43XGmKG7VAzbf/i39GUmCaSgMBswCfRsyWtnhaUFC9qo/WfZN2+C6QkEU=
 =1LxQ
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2025.01-rc3-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.01-rc3:

- microblaze:
  - Disable JFFS2
- fpga:
  - pass compatible flag to fpga_load()
- zynqmp:
  - SOM RTC fix
  - SC(system controller) PMW polarity fix
  - Fix ram_top calculation with introducing XILINX_MINI
  - Fix RPU release command
- versal:
  - Enable capsule update
  - Enable soft reset and Micron octal flashes
- xilinx:
  - Align Kconfig regarding SPI_STACKED_PARALLEL
- bootcount:
  - Add new zynqmp driver
2024-11-19 12:58:05 -06:00
Michal Simek
383fc2f501 xilinx: Introduce XILINX_MINI configuration
There is no common symbol which mini configurations are using and recent
get_mem_top() changes adding 1.3kB without having a way to remove it.
That's why introduce new symbol which can be used for removing features
which are not requested by these configurations.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aa27b72e17057fa8cbdd92a2bbb863a31c8c1226.1731681053.git.michal.simek@amd.com
2024-11-19 15:57:56 +01:00
Michal Simek
57066053b6 microblaze: Disable JFFS2 support
JFFS2 is not maintained for quite a long time and none should be using it.
Please use other filesystems for flashes like UBIFS instead.

Also remove jffs to MTD map but MTD map is for example that's why it won't
affect anything.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a8239acee8886229fdbff66142c46d522e3fe851.1731659933.git.michal.simek@amd.com
2024-11-19 15:57:31 +01:00
Venkatesh Yadav Abbarapu
93501f641b arm64: versal: Enable soft reset support for xspi flashes
Activate the xSPI Software Reset support, which will be
utilized to transition from octal DTR mode to legacy
mode during shutdown and boot (if enabled).

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114042641.22642-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-11-19 15:56:44 +01:00
Venkatesh Yadav Abbarapu
46911346ee arm64: versal: Enable defconfig for Micron octal flashes
The Micron MT35 series octal flashes can be activated
through the configuration option CONFIG_SPI_FLASH_MT35XU.
To ensure their detection, enable this option in the
default defconfig for octal flashes.

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114051047.13700-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-11-19 15:56:44 +01:00
Holger Brunck
f39199e809 km: disable CMD_JFFS2 for all PPC boards
We don't use this feature, we can remove it therefore in the defconfigs.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
2024-11-15 13:11:51 -06:00
Michal Simek
064c8978b4 arm64: versal: Enable capsule update (SD)
Enable capsule update in SD boot mode. For getting it work there is a need
to generate or setup dfu_alt_info and enable sysreset with DFU_MMC.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/cede513de764b99560dc3737457dbc8a5cc71d21.1729857366.git.michal.simek@amd.com
2024-11-15 14:32:47 +01:00
Michal Simek
6f7ff73fba arm64: xilinx: Rename SPI_ADVANCE to SPI_STACKED_PARALLEL
Align defconfigs with the latest Kconfig layout.

Fixes: f896aa656774 ("mtd: spi-nor: Rename SPI_ADVANCE to SPI_STACKED_PARALLEL")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fe05a0e542d6117c10956e4a104123e46f956793.1730450241.git.michal.simek@amd.com
2024-11-15 14:32:47 +01:00
Tom Rini
a45d823c02 Merge patch series "Apply SoM overlays on phyCORE-AM6xx SoMs"
Wadim Egorov <w.egorov@phytec.de> says:

Our SoMs are available in multiple configurations, managed via device
tree overlays. To determine the specific variant in use, we read the
EEPROM and apply the appropriate overlays during boot to the device tree
used by the OS.

Apply overlays for phyCORE-AM62x and phyCORE-AM64x SoMs.
Future K3 SoMs will be able to reuse this logic and overlays.

Link: https://lore.kernel.org/r/20241030164815.1763506-1-w.egorov@phytec.de
2024-11-14 10:49:51 -06:00
Wadim Egorov
5476cc005c configs: phycore_am64x_a53_defconfig: Enable PHYTEC_SOM_DETECTION
Enable CONFIG_PHYTEC_SOM_DETECTION to apply SoM overlays
based on EEPROM configuration.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2024-11-14 10:46:22 -06:00
Wadim Egorov
cfb88eb272 configs: phycore_am64x_a53_defconfig: Add SoM overlays to OF_OVERLAY_LIST
Include SoM dt-overlays for DT control so we can include them
into our u-boot FIT image.
While at it also resync after savedefconfig.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2024-11-14 10:46:22 -06:00
Wadim Egorov
dc8a30a370 configs: phycore_am62x_a53_defconfig: Add SoM overlays to OF_OVERLAY_LIST
Include SoM dt-overlays for DT control so we can include them
into our u-boot FIT image.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2024-11-14 10:46:22 -06:00
Simon Glass
a819845df7 sandbox: Add a build without CMDLINE
Sometimes this breaks, so add a build to keep it working. Since sandbox
enables a lot of options, it is a good board to use. The new config is
created simply by copying the existing sandbox and turning off CMDLINE

Once we have tests for non-CMDLINE operation, this can be adjusted to
run those tests.

Create a new build which will be picked up by CI. Update the maintainer
entry as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-11-13 16:02:58 -06:00
Tom Rini
9d49c73862 Merge patch series "lib: uuid: fix uuid_str_to_le_bin() on 32-bit"
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> says:

The lib_test_uuid_to_le and lib lib_test_dynamic_uuid tests fail on
32-bit systems. But we never caught this in our CI because we never
ran any of our C unit tests on 32-bit.

Enable CONFIG_UNIT_TEST on qemu_arm_defconfig.

hextoul() cannot convert a string to a 64-bit number on a 32-bit system.
Use the new function hextoull() instead.

Link: https://lore.kernel.org/r/20241103224223.195255-1-heinrich.schuchardt@canonical.com
2024-11-13 08:14:29 -06:00
Heinrich Schuchardt
37587d2e14 configs: enable UNIT_TEST on qemu_arm_defconfig
The lib_test_uuid_to_le test fails on 32-bit systems. But we never caught
this in our CI because we never ran any of our C unit tests on 32-bit.

Enable CONFIG_UNIT_TEST on qemu_arm_defconfig.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-11-13 08:14:23 -06:00
Tom Rini
b30787ad24 Merge patch series "Enable https for wget"
Ilias Apalodimas <ilias.apalodimas@linaro.org> says:

Hi all,

This is a respin of [1] adding https support to wget. In short

patch#1 enables the crypto algorithms we need in mbedTLS
patches#2, #3 enable anf fix the lwIP part we need
patch#4 is adding https:// parsing support in our wget
patch#5 is making https:// the default for QEMU lwip defconfig so
people can easily test
and finaly patch#6 updates our documentation

[1] https://lore.kernel.org/u-boot/20241024112449.1362319-1-ilias.apalodimas@linaro.org/

Link: https://lore.kernel.org/r/20241110083017.367565-1-ilias.apalodimas@linaro.org
2024-11-12 19:10:01 -06:00
Ilias Apalodimas
d9c4ee3838 configs: Enable https for wget on qemu arm64
QEMU already has an lwip variant of a defconfig. That defconfig
is also configured with mbedTLS by default. So let's enable the
remaining config options to enable wget for https:// as well
and test that codepath in the CI

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-11-12 19:09:52 -06:00
Tom Rini
867e16ae05 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-11-12 15:00:36 -06:00
Marek Vasut
f9cfc47a83 ARM: stm32: Add optional manufacturing environment to DH STM32MP15xx DHSOM
Add manufacturing environment into STM32MP15xx DH electronics DHSOM
configuration. This environment is part of every board build, but only
takes effect on systems booted with the dh,stm32mp15xx-dhcor-testbench
device tree, i.e. systems populated with factory build of U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-11-12 15:18:10 +01:00
Marek Vasut
0841716fdc ARM: stm32: Deduplicate DH STM32MP1xx DHSOM defconfigs
Deduplicate defconfigs for all DH STM32MP1xx DHSOM systems by factoring
out the common parts into generic stm32mp_dhsom.config and including
those using the #include <configs/...> preprocessor macro in the current
set of board specific defconfigs. The preprocessor macro is applicable
to defconfigs as well.

This introduces no functional change, the resulting .config is identical
for all DH STM32MP1xx DHSOM systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-11-12 14:18:43 +01:00
Marek Vasut
aa33518eb3 ARM: stm32: Deduplicate DH STM32MP15xx DHSOM defconfigs
Deduplicate defconfigs for all DH STM32MP15xx DHSOM systems by factoring
out the common parts into generic stm32mp15_dhsom.config and including
those using the #include <configs/...> preprocessor macro in the current
set of board specific defconfigs. The preprocessor macro is applicable
to defconfigs as well.

This introduces no functional change, the resulting .config is identical
for all DH STM32MP15xx DHSOM systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-11-12 14:18:43 +01:00
Michal Simek
4de127a44a arm64: zynqmp: Configure SoC RTC on SOM
Use RTC available in HW on Kria SOM without using emulation that's why
configure it properly and disable emulated one.
Power on reset value of RTC Calibration register without battery backup is
not matching with crystal frequency which leads to RTC time drift. That's
why write CALIB_WRITE register with crystal frequency (0x7FFF). There is
also an option to write zero so that Linux will set default value (0x7FFF)
in driver probe but calibration 0 is not permited by DT schema.

Co-developed-by: Srinivas Goud <srinivas.goud@amd.com>
Signed-off-by: Srinivas Goud <srinivas.goud@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9b684faeec85381b9b8fe796aaebc2ee79f17b8e.1729663761.git.michal.simek@amd.com
2024-11-12 09:01:46 +01:00
Tom Rini
fdcf06d58d Merge tag 'u-boot-rockchip-20241111' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/23280

- Add board:
        rk3328: FriendlyElec NanoPi R2S Plus
        rk3568: Qnap TS433
        rk3588: Cool Pi CM5 GenBook
- Move rk3399_force_power_on_reset to TPL for puma board;
2024-11-11 07:25:25 -06:00
Quentin Schulz
0a17123ded rockchip: rk3399: move sysreset-gpio logic to TPL
If TPL_GPIO and TPL_PINCTRL_ROCKCHIP are enabled and a sysreset-gpio is
provided in the TPL Device Tree, this will trigger a system reset
similar to what's currently been done in SPL whenever the RK3399 "warm"
boots. Because there's currently only one user of sysreset-gpio logic,
and TPL is enabled on that board, so let's migrate the logic and that
board to do it in TPL.

There are three reasons for moving this earlier:
- faster boot time as we don't need to reach SPL to be able to reset the
  system on a condition we know is already met in TPL,
- have less code to be impacted by the issue this system reset works
  around (that is, "unclean" SoC registers after a reboot),
- less confusion around the reason for restarting. Indeed when done from
  SPL, the following log can be observed:

"""
U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45)
Channel 0: DDR3, 666MHz
BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
Channel 1: DDR3, 666MHz
BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
256B stride
Trying to boot from BOOTROM
Returning to boot ROM...

U-Boot SPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45 +0100)
Trying to boot from MMC2

U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45)
"""

possibly hinting at an issue within the SPL when loading the fitImage
from MMC2 instead of the normal course of events (a system reset).

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:15 +08:00
Jonas Karlman
0bf38a8aa2 rockchip: rk35xx-generic: Disable late boardinfo
Disable DISPLAY_BOARDINFO_LATE as the early boardinfo print of Model
should be enough.

  U-Boot 2025.01-rc1 (Nov 02 2024 - 16:04:16 +0000)

  Model: Generic RK3566/RK3568
  DRAM:  8 GiB (effective 7.7 GiB)
  Core:  250 devices, 24 uclasses, devicetree: separate
  MMC:   mmc@fe2b0000: 1, mmc@fe310000: 0
  Loading Environment from nowhere... OK
  In:    serial@fe660000
  Out:   serial@fe660000
  Err:   serial@fe660000
  Model: Generic RK3566/RK3568
  Hit any key to stop autoboot:  0
  =>

Enable CMD_MISC to make it easier to inspect data in OTP.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Jonas Karlman
3133b7c645 board: rockchip: Add FriendlyElec NanoPi R2S Plus
The FriendlyElec NanoPi R2S Plus is a single-board computer based on
Rockchip RK3328 SoC. It features e.g. 1 GB DDR4 RAM, 32 GB eMMC,
SD-card, 2x GbE LAN, optional M.2 SDIO Wi-Fi and 2x USB 2.0 host.

Features tested on a NanoPi R2S Plus 2309:
- SD-card boot
- eMMC boot
- Ethernet
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Andy Yan
dfcd4afd4c board: rockchip: Add support for rk3588 GenBook
Add support for Cool Pi GenBook, it works as a carrier board
connect with CM5 SOM.

Specification:
- Rockchip RK3588
- LPDDR5X 8/32 GB
- eMMC 64 GB
- HDMI Type A out x 1
- USB 3.0 Host x 1
- USB-C 3.0 with DisplayPort AltMode
- PCIE M.2 E Key for RTL8852BE Wireless connection
- PCIE M.2 M Key for NVME connection
- eDP panel with 1920x1080

Tested by Armbian boot on USB disk.

Change-Id: I4d9b8572dc7c400077dde666633f3fea1b47dd03
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Heiko Stuebner
d3cacb79e7 board: rockchip: add support for Qnap TS433 devices
The Qnap TS433 is a 4-bay NAS based around the RK3568.

Two SATA bays are connected to the RK3568's own SATA controllers while
the other two are connected to a JMicron SATA controller living on the
PCIe bus.

It provides one 2.5Gb and one 1Gb ethernet port as well as 3 usb ports.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Lad Prabhakar
5fb5ed2f78 board: hoperun: Switch to use complete DTS files from upstream DTS
For upstream Linux kernel we use below DTBs for HiHope boards:
- r8a774a1-hihope-rzg2m-ex.dtb
- r8a774e1-hihope-rzg2h-ex.dtb
- r8a774b1-hihope-rzg2n-ex.dtb

Update the CONFIG_OF_LIST to match the above. Now that we have switched
upstream DTS, drop deleting the nodes and also rename the
r8a774*-u-boot.dtsi files to r8a774*-ex-u-boot.dtsi to match the OF_LIST
files so that the `bootph-all` property gets applied to required nodes
in upstream DTS.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
2024-11-10 19:38:46 +01:00
Chris Paterson
34547a44da configs: hihope_rzg2: Set correct MMC device for U-Boot env
Currently we set CONFIG_SYS_MMC_ENV_DEV=1 which is wrong:
  Loading Environment from MMC... MMC: no card present
  *** Warning - No block device, using default environment

This issue was introduced when we switched to using upstream Linux device
trees for the hihope boards which named the MMC devices differently.

Correct to dev 0 so that the U-Boot environment can be loaded from the
correct storage device.

Fixes: 18fb23b13158 ("ARM: dts: renesas: Switch to using upstream DT on 64bit Renesas SoCs")

Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2024-11-10 19:38:46 +01:00
Marek Vasut
354e33d06c ARM: dts: imx: Switch to using upstream DT on DH i.MX6 DHCOM
Enable OF_UPSTREAM to use upstream DT and add nxp/imx/ prefix to the
DEFAULT_DEVICE_TREE. And thereby directly build DTB from dts/upstream/src/
including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-11-09 08:54:35 -03:00
Michal Simek
d5f5e77818 riscv: Introduce configuration for 64bit version Microblaze V
The commit 7576ab2facae ("riscv: Add support for AMD/Xilinx MicroBlaze V")
added support for 32bit version. 64bit version is also available that's why
wire it up too.
DT is providing description for generic QEMU target.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-11-06 19:42:54 +08:00
Michal Simek
e4b8d8be4e xilinx: mbv: Align smode_defconfig with upstream QEMU
Align smode defconfig with upstream QEMU. It could be the part of commit
9d688e6da5c9 ("riscv: mbv: Align DT with QEMU").

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-11-06 19:42:48 +08:00
Andreas Schwab
e83a99cb67 configs: visionfive2: re-enable SPL_SYS_MMCSD_RAW_MODE
To restore MMC boot, enable SPL_SYS_MMCSD_RAW_MODE and recover
SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION and
SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION.

Fixes: 2a00d73d081 ("spl: mmc: Try to clean up raw-mode options")
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-11-06 18:59:11 +08:00
Tom Rini
4ef5664f81 Merge patch series "U-boot: arm: Refine the booting on Total Compute"
Leo Yan <leo.yan@arm.com> says:

This patch series is to refine the booting on Arm Total Compuate
platform.

It changes to use the info passed in DTB for initialization DRAM info,
and dynamically initializes the booting envoironment variables.

Another big change is to use an envoironment file for boot commands,
based on it, the series extends to support multiple block devices
(MMC and virtio). And the env file is extended for booting Debian.

The last commit is to update memory mapping info based on the DRAM info
passed via DT binding.

Link: https://lore.kernel.org/r/20241025171821.624702-1-leo.yan@arm.com
2024-11-04 16:41:38 -06:00