dram_para1 is different in the D1s DDR2 configuration, but investigation
shows its default value is not actually used, as a hardcoded value is
used in auto_scan_dram_rank_width(), and auto_scan_dram_size()
completely overwrites the existing value.
Clarify the logic here by splitting dram_para1 into its six different
fields, as done in dram_sunxi_dw.c.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Some of these unused parameters have different values on the D1s SoC,
which includes in-package DDR2. Make that explicit, instead of including
the values from the stock DDR3 configuration. We still keep the unused
parameters around for now, for comparison with the BSP DRAM parameters.
Signed-off-by: Samuel Holland <samuel@sholland.org>
On D1/D1s, the boot ROM enables the data cache, and it is left enabled
throughout SPL. Some DRAM controller settings affect the mapping of the
CPU address space, so the data cache must be flushed when changing them.
Signed-off-by: Samuel Holland <samuel@sholland.org>
The check is expected to pass on D1s, where the DRAM die has only one
bank, as signified by bit 12 being unset in the stock dram_para1 value.
Changing the offset matches the algorithm from dram_sunxi_dw.c (which
uses 2 bank bits + 9 page bits), and works on D1, D1s, and T113-S3.
Link: https://github.com/smaeul/sun20i_d1_spl/issues/14
Link: https://github.com/YuzukiHD/TinyKasKit/commit/1bc76937dcf3
Reported-by: YuzukiTsuru <gloomyghost@gloomyghost.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Zynq:
- Guard code around SPL_FS_LOAD_PAYLOAD_NAME
Versal*:
- Remove tftp block size 4096
Versal:
- Use clocks per DT binding
- Store driver data in data section
Versal Gen 2:
- Fix major/minor version decoding
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Merge tag 'xilinx-for-v2025.04-rc4' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx changes for v2025.04-rc4
Zynq:
- Guard code around SPL_FS_LOAD_PAYLOAD_NAME
Versal*:
- Remove tftp block size 4096
Versal:
- Use clocks per DT binding
- Store driver data in data section
Versal Gen 2:
- Fix major/minor version decoding
Currently, Kconfig allows building CONFIG_DM_74X164 without
CONFIG_DM_SPI, which results in linker errors because this driver
actually uses dm_spi_* functions:
drivers/gpio/74x164_gpio.o: in function `gen_74x164_write_conf':
undefined reference to `dm_spi_claim_bus'
undefined reference to `dm_spi_xfer'
undefined reference to `dm_spi_release_bus'
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Unfortunately this change was not safe as some devices are bound before
relocation, but we don't want to probe them.
It causes 'raise: Signal # 8 caught' on jerry.
Move the bootstage timer to after autoprobe in initf_dm() since the
trace test does not tolerate any variance.
This reverts commit 21dd873572a01d74bfdfceb7a30b056f8ccba187.
Signed-off-by: Simon Glass <sjg@chromium.org>
Line 171 in README is describing that before relocation
no code should use global variable because global variables
are placed to BSS section which is initialized to 0 after
relocation.
On Versal platforms clock driver is initialized before
relocation (via using dm,bootph-all flag in DT) and global
variables are initialized which works if this is used only
before relocation. But the variables are used after
relocation too but values are zeroed which is ending up
incorrect behavior.
That's why place variables to data section to ensure that
values are not cleared which is for now the quickest
temporary solution. The correct way to do it is to move
all global variables to private data to avoid it.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250218052419.1141139-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
As per the bindings the reference clocks naming has changed
from "pl_alt_ref_clk" to "pl_alt_ref" and "ref_clk" to "ref".
Update the same in the clock driver. Also add the fallback option
for older DT bindings.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250206091533.1447234-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
When an error is detected in the TSEC receive path, the driver currently
prints an error message, but leaves the corresponding packet descriptor
in its old state (i.e. owned by the CPU side). As a result, the packet
queue can be starved of available buffers if enough errors happen.
To recover from errors, re-arm the packet buffer descriptor after an
error has been detected.
Errors can be provoked by changing a PHY with phy-mode = "rgmii-id" to
phy-mode = "rgmii".
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This is necessary for the following patch. No functional change.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
These two files were using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The pin count wasn't updated when the special pins were added, as a
result it was never possible to configure the special pins on SM8250
boards.
Fix the pin count and allow the special pins to be configured. This
fixes sdcard support on the RB5.
Fixes: 58fa52042471 ("pinctr: qcom: sm8250: add special pins pins configuration data")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add the other LDOs that our rpmh driver can currently support. Some of
these are used on the RB5 to power the sdcard.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add support for sm8150 clock controller to clk stub driver.
Signed-off-by: Julius Lehmann <lehmanju@devpi.de>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Add a stub clock driver which can be used to bind clock controllers
which aren't required for the platform to boot, but which are needed for
U-Boot drivers to work.
In addition, add a NOP parent driver to allow for binding the parent
nodes of the clock.
Initially this driver supports a Qualcomm platform where the MMC driver
tries to fetch the RPM clock controller, which is not actually required
for the device to work.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
For eMMC v4 and newer that is smaller than 2 GiB, the JEDEC JESD84-B51
section 6.2.4 Configure partitions indicates that EXT_CSD SEC_COUNT
should not be used to determine device size, and instead device size
should be calculated from C_SIZE and C_SIZE_MULT.
This is not exactly accurate, the 2 GiB limit is not a hard line,
there are eMMC devices which are smaller than 2 GiB and still
require device size to be determined from EXT_CSD SEC_COUNT. The
hard line is instead OCR HCS bit, which indicates whether the device
is byte or sector addressed, the former applies to most devices
below 2 GiB, and the later applies mostly to devices above 2 GiB.
However, there are a couple of devices which are smaller than 2 GiB
and still set the OCR HCS bit to indicate they are sector addressed,
and therefore the size calculation for those devices should also
use EXT_CSD SEC_COUNT . Use mmc->high_capacity flag to discern the
devices instead of arbitrary 2 GiB limit. The mmc->high_capacity flag
reflects the OCR HCS bit state.
Fixes: 639b7827d1ca ("mmc: fix the condition for MMC version 4")
Signed-off-by: Marek Vasut <marex@denx.de>
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.
Change to disable RX and/or TX delay and using zero as delay value.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.
Change to disable RX and/or TX delay and using zero as delay value.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width,
correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is
recalculated so it remain unchanged. Add missing GPIO3-B1 to GPIO3-B7
pinmux data to rk3328_mux_recalced_data as mux register offset for these
pins does not follow rockchip convention.
This matches changes in following Linux commits:
- e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins")
- 5ef6914e0bf5 ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins")
- 128f71fe014f ("pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
As per TRM[0] Section 8.7.1 "TPS6594-Q1 Registers", LDOx_Vout
bit 6-1, define the NVM voltage settings.
Along side table 8-4 of above TRM, shows voltage to value mapping.
Driver wrongly using bits 5-1 to calculate voltage, and to convert
voltage to value driver was using buck's calculation.
So fix those calculation.
[0]: https://www.ti.com/lit/ds/symlink/tps6594-q1.pdf
Fixes: 5d7dbd22cf7d ("power: regulator: tps65941: use function callbacks for conversion ops")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
The struct contains an iomem pointer that we later remap and update.
Remove const from the struct definition.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Pin detection on t20 depends on node name. With recent changes
in node naming, let's remove '_' to be safe about both '_' or
'-' use.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Bind SYSRESET child to parent node since it does not have
its own node in the device tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Bind GPIO and SYSRESET children to parent node since they
do not have their own nodes in the device tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Requesting of PMIC's GPIO child should be done by binding
GPIO driver to PMIC's node is GPIO driver does not have
its own node.
This reverts commit c03cd98d1a163666b4addcdd9a34fc0c77dfd0a5.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
u-boot-dfu-20250211:
CI:
- https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/24556
Android:
- Handle boot images with missing DTB
Usb gadget:
- Fix nullptr in g_dnl when serial# is unset
- Add missing schedule() in f_mass_storage gadget
- Add support for STih407 in dwc3-generic
- Fix usb clocks on STih407
- Migrate STih407 to DM_USB_GADGET
Add STi glue logic to manage the DWC3 HC on STiH407
SoC family. It configures the internal glue logic and
syscfg registers.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20250130163547.512990-6-patrice.chotard@foss.st.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
STi will migrate to dwc3-generic driver, dwc3-sti-glue driver
can be removed.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20250130163547.512990-4-patrice.chotard@foss.st.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
In case "ums" command is used on platforms which don't implement
g_dnl_board_usb_cable_connected() and USB cable is not connected,
we stay inside sleep_thread() forever and watchdog is triggered.
Add schedule() call to avoid this issue.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20241202074644.5380-1-patrice.chotard@foss.st.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
emul_rtc_probe() is not called from anywhere else that's why make it
static. Issue is reported by build with W=1.
Signed-off-by: Michal Simek <michal.simek@amd.com>
This patch add support to read register base address by name if
provided.
Also devfdt_get_addr_* is changed to dev_read_addr_* to support DT
live tree.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The reg-names in mt7988.dtsi have no _base suffix. Remove the suffix
will also make it match upstream linux format.
Fixes: 8c2cb748ef5 (pinctrl: mediatek: mt7988: rename reg-names to upstream linux format)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Heiko Schocher <hs@denx.de> says:
In linux we have the option to create the name of a led
optionally through the following properties:
- function
- color
- function-enumerator
This series adds support for parsing this properties if there
is no label property.
Link: https://lore.kernel.org/r/20250128135246.74838-1-hs@denx.de
[trini: Document name parameter in led.h]
in linux we have the option to create the name of a led
optionally through the following properties:
- function
- color
- function-enumerator
This patch adds support for parsing this properties if there
is no label property.
The led name is created in led_post_bind() and we need some
storage place for it. Currently this patch prevents to use
malloc() instead it stores the name in new member :
char name[LED_MAX_NAME_SIZE];
of struct led_uc_plat. While at it append led tests for the
new feature.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
The current behaviour of this function will dereference a null pointer
if the serial# environment variable is unset. This was discovered on a
board where U-Boot did not have access to the first 256MB of ram,
resulting in a board crash.
In the event that U-Boot has full access to memory, it will still read
from address 0, which is probably not optimal.
This simple check is enough to fix it
Signed-off-by: Michael Ferolito <michaelsunn101@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20250128030945.1219589-1-michaelsunn101@gmail.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Fixes annoying warnings of the following type when built with W=1 (for
each file including fpga.h):
CC drivers/fpga/fpga.o
In file included from /mnt/data/adahl/src/u-boot/include/xilinx.h:7,
from /mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:10:
/mnt/data/adahl/src/u-boot/include/fpga.h:61:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
61 | const fpga_desc *const fpga_get_desc(int devnum);
| ^~~~~
/mnt/data/adahl/src/u-boot/include/fpga.h:81:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
81 | const fpga_desc *const fpga_validate(int devnum, const void *buf,
| ^~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:36:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
36 | const fpga_desc *const fpga_get_desc(int devnum)
| ^~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:53:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
53 | const fpga_desc *const fpga_validate(int devnum, const void *buf,
| ^~~~~
Do some type and cast cleanup on that fpga_desc type while at it.
Link: https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#index-Wignored-qualifiers
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20250121162213.1477506-1-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
