dram_para1 is different in the D1s DDR2 configuration, but investigation
shows its default value is not actually used, as a hardcoded value is
used in auto_scan_dram_rank_width(), and auto_scan_dram_size()
completely overwrites the existing value.
Clarify the logic here by splitting dram_para1 into its six different
fields, as done in dram_sunxi_dw.c.
Signed-off-by: Samuel Holland <samuel@sholland.org>
The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the
same DRAM initialisation code.
Make use of prior art here and lift some code from awboot[1], which
carried init code based on earlier decompilation efforts, but with a
GPL2 license tag.
This code has been heavily reworked and cleaned up, to match previous
DRAM routines for other SoCs, and also to be closer to U-Boot's coding
style and support routines.
The actual DRAM chip timing parameters are included in the main file,
since they cover all DRAM types, and are protected by a new Kconfig
CONFIG_SUNXI_DRAM_TYPE symbol, which allows the compiler to pick only
the relevant settings, at build time.
The relevant DRAM chips/board specific configuration parameters are
delivered via Kconfig, so this code here should work for all supported
SoCs and DRAM chips combinations.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Sam Edwards <CFSworks@gmail.com>
