97999 Commits

Author SHA1 Message Date
Tom Rini
82686e678e Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes,
resolve some whitespace issues and fix the name of the new apalis-tk1
env file by Tom.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-13 10:43:24 -06:00
Svyatoslav Ryhel
711fcd3bda video: panel: add Sharp LQ101R1SX01 MIPI DSI panel driver
This module is a color active matrix LCD module incorporating
Oxide TFT (Thin Film Transistor). It is composed of a color TFT-LCD
panel, driver ICs, a control circuit and power supply circuit, and
a backlight unit. Graphics and texts can be displayed on a 2560×1600
dots panel with (16,777,216) colors by using MIPI DUAL DSI interface,
supplying +3.3V DC supply voltage for TFT-LCD panel driving and
supplying DC supply voltage for LED Backlight.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:33:46 +03:00
Svyatoslav Ryhel
744bce5123 video: tegra20: dsi: add ganged mode support
Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:33:46 +03:00
Svyatoslav Ryhel
68ebc7c86b video: tegra20: dc: remove DECLARE_GLOBAL_DATA_PTR use
It seems that DECLARE_GLOBAL_DATA_PTR use is not needed and video system
works perfectly fine without it.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:33:46 +03:00
Svyatoslav Ryhel
43800d7f6d usb: host: tegra: get usb phy configuration from phy node
Obtain USB phy configuration from phy node if such exists
and is enabled. If no, set default values.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:33:39 +03:00
Ion Agorria
539633805d arm: tegra: add AP20 and AP20H SKU
Add previously undocumented SKU - AP20H found in LG Optimus 2X (P990).
Correct existing T20_7 name as it's proper name is AP20.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:24:15 +03:00
Ion Agorria
2b323dce57 arm: tegra: fix typo in logging functions
Change %02X to %02x since it always displayed 00 otherwise.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:24:15 +03:00
Svyatoslav Ryhel
8768ade2b5 board: asus: transformer: implement multi-DTB support
Use board revision detection mechanism to choose correct DTB.
Adjust documentation and build setup accordingly.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:24:03 +03:00
Svyatoslav Ryhel
1c1608e0c7 board: asus: grouper: implement multi-DTB support
Use board revision detection mechanism to choose correct DTB.
Adjust documentation and build setup accordingly.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Svyatoslav Ryhel
1f7a575615 board: htc: endeavoru: simplify RCM hook
Use SPL GPIO functions to simplify RCM hook on HTC One X.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Svyatoslav Ryhel
37f85ab4ae board: asus: grouper: dynamically detect correct SPL configuration
Use PMIC detection mechanism to find correct configuration.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Svyatoslav Ryhel
2ff444d07d drivers: tegra_gpio: add early SPL functions
In some cases access to GPIOs is needed so early that DM
is not ready even nearly. These functions are exactly for
this case.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Svyatoslav Ryhel
d7c98f2030 ARM: tegra-u-boot: add recipe for multi-dtb image
Buildman has difficulties with constructing multi-dtb images, so
let's add a temporary custom recipe for it.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Svyatoslav Ryhel
539800bf92 ARM: tegra: board2: add common dtb reselect logic
Add common logic for dynamic dtb switch and DM reload if board
features multi-dtb support.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Jonas Schwöbel
b515d7ae0d Tegra30: Add funcmux for UART over SD slot
Tegra 3 has UART-E exposable via SD card slot which may be
handy for debugging. This change only adds funcmux part, to
use UART-E on the device you additionally would need:
- set stdout-path to serial@70006400 (uarte)
- configure sdmmc1_dat3_py4 and sdmmc1_dat2_py5 pinmux for
  uarte
- disable or remove sdhci@7800000 node
- enable CONFIG_TEGRA_ENABLE_UARTE in defconfig
- set CFG_SYS_NS16550_COM to NV_PA_APB_UARTE_BASE in device
  header

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Svyatoslav Ryhel
5e13730fc6 board: tegra: convert boards to text env
Convert boards to use text based env. This is the first stage of
conversion, common inclusions should be converted next.

Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com> # Toradex Apalis TK1
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Svyatoslav Ryhel
83b5f63679 disk: add TegraPT support
TegraPT is compatible with EFI part but it can't pass Protective MBR check.
Skip this check if CONFIG_TEGRA_PARTITION is enabled, storage uclass is MMC
and devnum is 0. Note, eMMC on supported devices MUST be aliased to mmc0.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Peng Fan
19c0e50a69 clk: imx8mp: Add i.MX8MP Dummy clk
i.MX8MP SDHC use CLK_IMX8MP_DUMMY clk entry. Without the clk, the bulk
api will return failure.

The correct entry should be replaced with IMX8MP_IPG_ROOT clk in device
tree. This will be done in Kernel device tree and sync to U-Boot in
future:
https://lore.kernel.org/all/20241012025221.1728438-1-peng.fan@oss.nxp.com/

Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API")
Reported-by: Gilles Talis <gilles.talis@nxp.com>
Tested-by: Gilles TALIS <gilles.talis@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:46:05 -03:00
Gilles Talis
b970b73e1e arm64: imx: imx8mp-debix-model-a: Migrate to OF_UPSTREAM
Device tree for this board can be deleted. Device tree location
now points to the freescale/ directory.

Use absolute path to PMIC node entry and its regulators as
device tree in kernel does not provide corresponding labels

Signed-off-by: Gilles Talis <gilles.talis@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:45:36 -03:00
Peng Fan
03b415d753 imx8: Correct the SCU API return value check
The SCU API alreay has been converted to return Linux error code,
using SCU error code is not correct here, although SC_ERR_NONE is value
as 0.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:45:16 -03:00
Brian Ruley
cd31c72872 binman: add fast authentication method for i.MX8M signing
Using the PKI tree with SRKs as intermediate CA isn't necessary or even
desirable in some situations (boot time, for example). Add the possibility
to use the "fast authentication" method where the image and CSF are both
signed using the SRK [1, p.63].

[1] https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors/202591/1/CST_UG.pdf

Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-13 09:44:00 -03:00
Brian Ruley
784f84d5d8 binman: cosmetic: refactor `nxp_imx8mcst' etype code
Simplify code and conform to the style guide used in the project by
making the following changes:
* Capitalize global constants
* Use single quotes for multiline strings (except docstrings)
* Fix line width to 79 cols
* Use f-string instead of formatting a regular string or using a
  complicated concatenation
* Move common suffix used in keys to a global variable "KEY_NAME"
  to reduce the likelihood of typos and making future changes
  easier

Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
Cc: Marek Vasut <marex@denx.de>
2024-10-13 09:44:00 -03:00
Marek Vasut
e612d5c2b2 ARM: imx: Update MAINTAINERS file globs for i.MX8MP DHSOM
Update the MAINTAINERS file glob to cover all of i.MX8MP DHSOM related files.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-13 09:43:05 -03:00
Marek Vasut
d947b78a1e ARM: imx: Update MAINTAINERS file globs for i.MX6 DHSOM
Update the MAINTAINERS file glob to cover all of i.MX6 DHSOM related files.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-13 09:43:05 -03:00
Ye Li
6f446ccc1f misc: fuse: Update fuse driver
When OSCCA is enabled, FSB fuse shadow (offset 0x8000)
access is disabled for SOC. So update the driver to read fuse
from ELE API. The ELE has supported to read all shadow fuses like
FSB, reuse the table of FSB for the word index used by ELE API.

Add ELE shadow fuse read and write to current ELE fuse driver.
But when LC is OEM closed, the ELE read/write shadow fuse APIs are
forbidden. Reading from any fuse will return error. This causes
problem to u-boot which must read out some fuse no matter whatever LC.
So we have to change back to read from FSB and ELE common fuse read API.
For using ELE shadow read API for development purpose like checking
the ELE shadow fuse write result, user can set env variable
"enable_ele_shd" to y to switch it.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:43:05 -03:00
Ye Li
b1fc93b95e misc: fuse: Fix FSB redundancy fuse word check and clear res
There is a bug when checking fuse word with redundancy fuse in FSB
table. The redundancy fuses are combined into 4 words, so we can't
directly use word index to do the check, otherwise the high 4 words
will fail to match.

And When calling ELE API, res parameter will pass to ELE API to get ELE
response value for failure. So most of usage does not initialize
this variable and print it after calling ELE API.
However, when ELE API returns failure, we can't ensure this res is
always set because there may be other failure like MU failure.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:43:05 -03:00
Ye Li
e6bdb8dfde misc: ele_api: Add read/write shadow fuse APIs
Add ELE APIs to support read and write shadow fuses

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:43:05 -03:00
Peng Fan
929dc83b73 misc: ele_api: Update ELE read common fuse API
On iMX8ULP, the word index 1 is used to read OTP_UNIQ_ID with 4 words
data responsed. However this special index does not apply others.
So restrict the check to i.MX8ULP to avoid problem when reading from
fuse word 1 for others, such as i.MX93.

Also update header order

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:43:05 -03:00
Peng Fan
e743134074 misc: ele_mu: Clear RR when initialize MU
When OS is doing ELE API call, before OS get the response, OS is force
reseted, then it is possible that MU RR has data during initialization
in SPL stage. So clear the RR registers, otherwise SPL ELE API call will
work abnormal.

Cc: Alice Guo <alice.guo@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:43:05 -03:00
Ye Li
2630ceecef misc: ele_mu: Update ELE MU to get TR/RR number from HW
The MU parameter register can provide the TR and RR number.
For i.MX95 which has 8 RR is different with i.MX93 and i.MX8ULP,
so update the driver to read the PAR for exact TR and RR number.

Also update compatible string for i.MX95 ELE MU.

Cc: Alice Guo <alice.guo@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2024-10-13 09:43:05 -03:00
Linus Walleij
25e46f8281 board: bcm96846: Switch to using OF_UPSTREAM
This board clearly develops first in Linux which had more
hardware listed, so let's start to use OF_UPSTREAM.
This makes the NAND driver work.

Suggested-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-12 18:10:57 +02:00
Linus Walleij
4c6f2ab29a board: bcm96846: Enable NAND options
This adds reasonable NAND options to the BCM96846 reference design:

- CMD_NAND, MTD_RAW_NAND
- Disable SYS_NAND_ONFI_DETECTION as this just give error messages
- MTD, MTDPARTS with DM and related config options
- CMD_UBI and CMD_UBIFS as this is likely used with ubi/ubifs

What I didn't add was something like the following:

CONFIG_MTDPARTS_DEFAULT="nand0:256k(cfi),257024k(image)"

Because I don't actually have a BCM96846 reference design. These
are only available to Broadcom and their customers  I think,
but perhaps the people at Broadcom can provide the detail of
the flash layout for BCM96846 so we can add this too so the
bcm96846_config is usable out of the box.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-12 18:10:56 +02:00
Linus Walleij
8439ab9b3d drivers: nand: bcmbca: Enable on BCM6846
The BCM6846 has the BRCMBCA NAND controller so enable
it.

Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-12 18:10:56 +02:00
Linus Walleij
a49519539a mtd: rawnand: brcmnand: Add BCMBCA RAW NAND driver
The Broadcom BCA platforms are broadband access SoCs.
This is a port of the upstream Linux driver to U-Boot.
It was based on drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
from Linux v6.11.

Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-12 18:10:44 +02:00
Zixun LI
1db2aadd84 mtd: nand: raw: atmel: Use ONFI ECC params if available
When ECC parameters are not specified in DT, first try ONFI ECC parameters
before fallback to maximum strength.

It's the Linux driver behavior since the driver rewriting in f88fc12.

From then 2 nand system refactors have been done in 6a1b66d6 and 53576c7b,
chip->ecc_strength_ds and chip->ecc_step_ds became
nanddev_get_ecc_requirements(). U-Boot didn't follow the refactor and
always use these 2 fields.

v2: Fix formatting, add upstream commit hash.

Signed-off-by: Zixun LI <zli@ogga.fr>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Balamanikandan Gunasundar
2024-10-12 18:10:21 +02:00
Tom Rini
47e544f576 Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"
Simon Glass <sjg@chromium.org> says:

When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL

Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.

For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:

   #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)

In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.

This series starts a change in terminology and usage to resolve the
above issues:

- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
  'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
  defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_

It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.

This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.

The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
2024-10-11 12:23:25 -06:00
Simon Glass
0220a68c25 qconfig: Update tool for new Makefile variables
Take account of the new XPL_ and PHASE_ instead of the old SPL_ and
SPL_TPL_

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
96ed5b0e3e spl: Rename SPL_TPL_NAME and SPL_TPL_PROMPT
Rename these to use the word PHASE instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
5c10c8badf global: Rename SPL_TPL_ to PHASE_
Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.

Update the comment in bootstage to refer to this symbol, instead of
SPL_

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
c46760d596 global: Rename SPL_ to XPL_
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
53abdda2f6 kconfig: binman: Check for SPL instead of XPL
Now that SPL means SPL (only) and is not defined for other phases,
update kconfig rules.

This is done in one patch since otherwise many Binman tests fail.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
9280a948b1 xpl: Define CONFIG_SPL_BUILD only for the SPL build
Make this define mean SPL only, not TPL, VPL, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
1d6132e2a2 global: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Complete this rename for all directories outside arch/ board/ drivers/
and include/

Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
f38956a687 include: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
371dc068bb drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
dac3ce976a board: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
bef9fdbed2 arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
ac644df9a4 doc: Update init docs for the xPL changes
Update the documentation here to cover the meaning of xPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
64746bfdff doc: Move init-related things out of README
Move this section to rst, changing it just enough so that it builds.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
8651eb1f25 README: Drop SoC-specific comment about SPL
This should not be in the generic README file, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00