The bootcount documentation was using "unattended" while it probably
intending to say "unintended"
Signed-off-by: Vasileios Amoiridis <vasileios.amoiridis@cern.ch>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Add support to save boot count variable in ANY filesystem. Tested with
FAT and EXT.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Philip Oberfichtner <pro@denx.de>
Signed-off-by: Vasileios Amoiridis <vasileios.amoiridis@cern.ch>
On some SoCs, like Qualcomm SoCs, the PSCI cluster power domain
is used by system-wide firmware interfaces to make sure none
of the CPUs are suspended before submitting requests.
While on U-boot we only use the first core and we never
suspend it, the Device Tree still references it and blocks
those nodes to be probed.
Simply bind the PSCI power-domain subnoded to a stub power
domain driver in order to solve the runtime dependencies.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Nothing really major here, some rework of the SPL PMIC drivers, adding
support for the AXP717 on the way, which is showing up on newer boards
now, most prominently some Anbernic handheld gaming devices. The rest
is enabling Ethernet and SPI boot on the Allwinner V3s SoC, plus two
fixes. This also updates the "traditional U-Boot" DTs to that of kernel
v6.9. I will look into upgrading some SoCs to dts/upstream in the
coming cycle, though this will not cover all SoCs for now, as we carry
some non-mainline fix to improve compatibility with older kernels. Will
see how it goes, but for now we stick with the "old way".
The branch survived the gitlab CI run, and Linux boot testing on some
selected boards.
The driver is trying to read the "spi-max-frequency" property of the
*controller* driver node. There is no such property. The
"spi-max-frequency" property belongs to the SPI devices on the bus.
Right now, the driver will always fall back to the default value of 1MHz
and thus flash reads are very slow with just about 215kb/s.
In fact, the SPI uclass will already take care of everything and we just
have to clamp the frequency to the values the driver/hardware supports.
Thus, drop the whole max_hz handling.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
The BootROM in the Allwinner H616 tries to load the initial boot code
from sector 16 (8KB) of an SD card or eMMC device, but also looks at
sector 512 (256KB). This helps with GPT formatted cards.
A "high" boot offset is also used on previous SoCs, but it's sector 256
(128KB) there instead.
Extend the existing offset calculation code to consider the different
sector offset when running on an H616 SoC. This allows to load U-Boot
on any H616 device when the SPL is not located at 8KB.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Ryan Walklin <ryan@testtoast.com>
The V3s is identical regarding register layout, clocks and resets to
the sun6i variants. Therefore, we can just add the MACH_SUN8I_V3S to
the sun6i compatible ones.
SPI boot was tested on a custom board with a Gigadevice GD25Q64 8MiB
SPI flash.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Add the compatible string for the emac found on the V3s SoC. The SoC
only supports the internal PHY. There are no (R)MII signals on any pins.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Add the clock gate registers as well as the reset register bits for the
EMAC and EPHY for the V3s. These are needed by the sun8i network driver.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Sync the devicetree files from the official Linux kernel tree, v6.9.
This is covering Allwinner SoCs with 32-bit and 64-bit ARM cores.
Besides some cosmectic changes, this adds S/PDIF, DMA, and thermal
support to the H616 .dtsi. Nothing that U-Boot needs for itself, but
helpful to pass on to kernels.
This also adds new devicetrees, for some LonganPi H616 board, and the
Remix Mini PC. The latter will get a defconfig next.
As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>