Many boards use a minimal .cfg file in the SPL case.
Introduce spl_sd.cfg so that we can reuse it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
Move the configuration to the spl code.
CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Marek Vasut <marex@denx.de>
mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
Move the configuration to the spl code.
CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
Move the configuration to the spl code.
CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The PFUZ probe failed with the following msg:
" wait_for_sr_state: failed sr=81 cr=a0 state=2020
i2c_init_transfer: failed for chip 0x8 retry=0
wait_for_sr_state: failed sr=81 cr=a0 state=2020
i2c_init_transfer: failed for chip 0x8 retry=1
wait_for_sr_state: failed sr=81 cr=a0 state=2020
i2c_init_transfer: failed for chip 0x8 retry=2
i2c_init_transfer: give up i2c_regs=021a0000
Can't find PMIC:PFUZE100 "
board_early_init_f is too early to call i2c related setting, because
init_func_i2c is called after board_early_init_f being invoked. Thus
move setup_i2c into board_init.
Also PFUZ is connected to I2C bus 0, so change "1" -> "0".
Using this patch PFUZ can be correctly probed:
"PMIC: PFUZE100 ID=0x11"
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
1000BASE-KX(1G-KX) uses SGMII protocol but the serdes lane runs in 1G-KX
mode. By default, the lane runs in SGMII mode, when a MAC uses a lane
in 1G-KX mode, corresponding bit in PCCR1 for the lane needs to be set,
and needs to fixup dtb accordingly for kernel to do proper initialization.
Hwconfig "fsl_1gkx" is used to indicate a MAC runs in 1G-KX mode, FM1 MAC
1/2/5/6/9/10 are available for 1G-KX, MAC 3/4 run in RGMII mode. To set a
MAC runs in 1G-KX mode, set its' corresponding env in "fsl_1gkx",
'fm1_1g1' stands for FM1-MAC1, 'fm1_1g2' stands for FM1-MAC2, etc.
If all MAC 1/2/5/6/9/10 run in 1G-KX mode, the hwconfig should has below
setting:
fsl_1gkx:fm1_1g1,fm1_1g2,fm1_1g5,fm1_1g6,fm1_1g9,fm1_1g10
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
[York Sun: Fix compiling warning]
Reviewed-by: York Sun <yorksun@freescale.com>
XFI ports on t2080qds can work with fiber cable and direct attach
cable(copper). We use hwconfig to define cable type for XFI, and fixup
dtb based on the cable type.
For copper cable, set below env in hwconfig:
fsl_10gkr_copper:<10g_mac_name>
the <10g_mac_name> can be fm1_10g1, fm1_10g2, fm1_10g3, fm1_10g4.
fm1_10g1 stands for FM1-MAC9, fm1_10g2 stands for FM1-MAC10, fm1_10g3
stands for FM1-MAC1, fm1_10g4 stands for FM1-MAC2. The four
<10g_mac_name>s do not have to be coexist in hwconfig. For XFI ports, if
a given 10G port will use the copper cable for 10GBASE-KR, set the
<10g_mac_name> of the port in hwconfig, otherwise, fiber cable will be
assumed to be used for the port.
For ex. if four XFI ports will both use copper cable, the hwconfig
should contain:
fsl_10gkr_copper:fm1_10g1,fm1_10g2,fm1_10g3,fm1_10g4
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The gdsys hrcon board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.
On board peripherals include:
- 1x GbE (optional)
- Lattice ECP3 FPGA connected via eLBC and PCIe
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang Denk found this issue using cppcheck:
(error) Uninitialized variable: fpga_features
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
The code for this board supports following features:
- Boot media support: NAND flash/SD card/SPI flash
- Support LCD display (optional, disabled by default)
- Support ethernet
- Support USB mass storage
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The code for this board supports following features:
- Boot media support: NAND flash/SD card/SPI flash
- Support LCD display
- Support ethernet
- Support USB mass storage
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
replaces the at91bootstrap code with SPL code.
make the spl image with:
./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin
this writes the length of the spl image into the 6th
execption vector. This is needed from the ROM bootloader.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
replaces the at91bootstrap code with SPL code.
make the spl image with:
./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin
this writes the length of the spl image into the 6th
execption vector. This is needed from the ROM bootloader.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This change adds support for enabling the USB host features of the board.
This includes the USB3503A hub and the SMC LAN9730 ethernet controller
as well.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This adds following things :
- New config and defconfig for Peach-Pi board.
- Alterations in Kconfig and MAINTAINERS.
- Addition of CONFIG_EXYNOS5800.
- ADdition of exynos5800-peach-pi in dts list.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Gose board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of
dram_init_banksize instead.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Lager board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of
dram_init_banksize instead.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Koesch board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of
dram_init_banksize instead.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Alt board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of
dram_init_banksize instead.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
There are two usb port on mx6sxsabresd board:
1. otg port
2. host port
The following are the connection between usb controller and board usb
interface, host port has not ID pin set:
otg1 core <---> board otg port
otg2 core <---> board host port
In order to make host port work, board_usb_phy_mode return USB_INIT_HOST
to make host port work in HOST mode.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <B37916@freescale.com>
Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
There are two usb port on mx6slevk board:
1. otg port
2. host port
The following are the connection between usb controller and board usb
interface, host port has not ID pin set:
otg1 core <---> board otg port
otg2 core <---> board host port
In order to make host port work, board_usb_phy_mode return USB_INIT_HOST
to let host port work in host mode.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <B37916@freescale.com>
* fdt_fixup_mtdparts is called from ft_board_setup
* Run "mtdparts default" to create NAND partition on uboot
* Use mtdparts to create partitions dynamically rather
than using static partitions in device tree
Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
* fdt_fixup_mtdparts is called from ft_board_setup
* run "mtdparts default" to create NAND, NOR partition on uboot
* Use mtdparts to create partitions dynamically rather
than using static partitions in device tree
Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
-A_007662 states that for x1 link width, PCIe2 controller trains in
Gen1 speed while configured for Gen2 speed.
Workaround:Set the width to x1 and speed to Gen2 by writing to
CCSR registers in PBI phase
-A_008007 states that PVR register may show random value.
Workaround: Reset PVR register using DCSR space in PBI phase
Add PBI based software workaround for A_007662 and A_008007
in t104x_pbi.cfg. This is required for SPL-based bootloaders
like NAND-boot, SD-boot, SPI-boot
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This support of CPLD includes
- Files and register definitions
- Command to switch alternate bank
- Command to switch default bank
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add initial support for TBS2910 Matrix ARM miniPC.
Support includes MMC, Ethernet, UARTs, HDMI, USB, SATA, PCI, I2C, RTC.
Signed-off-by: Soeren Moch <smoch@web.de>
When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This patch will enable the support for SPL on iMX6 SabreSD.
It tested on SD2 and SD3 mmc port (Switch 1 or 2 of SW6)
Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The i.MX6Q/DL sabreauto board has one NAND socket, set the
CONFIG_NAND_MXS and relevant NAND configurations to enable the
MXS NAND flash driver.
Add board level codes to set IOMUX and clock for GPMI-NAND and
BCH module.
Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Today I got the final board and found out that a different
connector is used as the one on my development board. The
new connector has swaped pins for cd and wp.
This change is tested on a production ready board.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Since kernel 3.15 there are two dtb's for the imx53-qsb board:
imx53-qsb.dtb - For the boards with DA9053 PMIC
imx53-qsrb.dtb - For the boards with MC34708 PMIC
Change the 'fdt_file' dynamically, so that the correct dtb can be used depending
on the board variant.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
The magic bit toucher needs to be updated to reflect the new board Kconfig structure
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Add support for the 2 ehci controllers found on the sun6i (A31) soc.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Marek Vasut <marex@denx.de>
Add proper Kconfig options to select the usb Vbus gpio-s, besides moving to
Kconfig being the right thing to do, an added advantage of this is that it
allows for boards without Vbus gpio-s.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Enable the SPL now that we've all the necessary bits in place.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The A31 uses the AXP221 pmic for various voltages.
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
--
Changes in v2:
-Rebase
Changes in v3:
-Add support for all dldo and aldo-s
-Add Kconfig option to select building AXP221 and to select voltage of
dldo and aldo-s
Changes in v4:
-Add axp221_setbits helper function
-Use symbolic names for enabled bits in CTRL1 - CTRL3 registers
