17645 Commits

Author SHA1 Message Date
Svyatoslav Ryhel
2fafac30ef ARM: t20/t30: swap host1x and disp1 clock parents
According to mainline clock tables and TRM HOST1X
parent is PLLC, while DISP1 usually uses PLLP as
parent clock.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Tested-by: Thierry Reding <treding@nvidia.com> # Beaver T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23 12:55:36 -07:00
Svyatoslav Ryhel
fca18a2643 tegra30: clock: add EXTPERIPH
This mappings were missing for some reason.

Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23 12:55:36 -07:00
Paweł Anikiel
48c172c2f8 arm: dts: chameleonv3: Add 270-2 variant
Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the
Mercury+ AA1 module

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-22 00:28:39 +01:00
Paweł Anikiel
9c107ab42b arm: dts: chameleonv3: Rename chameleonv3.dts to .dtsi
This file is included by the different chameleonv3 variants. Change the
name to .dtsi.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-22 00:28:39 +01:00
Paweł Anikiel
1d222089f0 arm: dts: chameleonv3: Override chameleonv3 bitstream names
Set the bitstream name per Chameleon variant. This allows the same
boot filesystem with all bitstream variants to be used on different
boards.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-22 00:28:39 +01:00
Simon Glass
8c103c33fb dm: dts: Convert driver model tags to use new schema
Now that Linux has accepted these tags, move the device tree files in
U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-14 09:43:26 -07:00
Sumit Garg
b97487db4e clocks: qcs404: Add support for I2C clocks
Co-developed-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-13 10:01:52 -05:00
Tom Rini
d7bcd6ee40 Merge tag 'i2c-updates-for-v2023.04' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2023.04

- add new i2c driver ast2600 from Ryan Chen

- i2c-cdns: make read fifo-depth configurable through device tree
  from Pei Yue Ho

- mxc i2c driver: print base address in hex, not in decimal
  from Fabio
2023-02-13 09:57:35 -05:00
Tony Dinh
dd15284b74 arm: kirkwood: Enable uart0 dm-pre-reloc for Pogoplug V4 board
When DM_SERIAL is enabled, the device-tree tag u-boot,dm-pre-reloc is
required for this board to boot over UART with kwboot. Enable this in
kirkwood-pogoplug-series-4-u-boot.dtsi.

Added by Stefan while applying:
Please note that it's not fully understood, why this property really
is needed. Here a link to the discussion about this:

https://lore.kernel.org/r/20230201080210.ypz4nrj4y2igwxz3@pali/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-02-13 10:15:04 +01:00
Tony Dinh
b21f87a5a5 arm: mvebu: Add support for Synology DS116 (Armada 385)
Synology DS116 is a NAS based on Marvell Armada 385 SoC.

Board Specification:

- Marvel MV88F6820 Dual Core at 1.8GHz
- 1 GiB DDR3 RAM
- 8MB Macronix mx25l6405d SPI flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 1x SATA (6 Gbps)
- 3x LED
- PIC16F1829 (connected to uart1)
- GPIO fan
- serial console

Note that this patch depends on the add-support for Thecus N2350 patch:
https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2023-02-13 10:14:50 +01:00
Tony Dinh
3fdd09f90f arm: mvebu: Add support for Thecus N2350 (Armada 385) board
Thecus N2350 is a NAS based on Marvell Armada 385 SoC.

Specification:

- Processor: Marvel MV88F6820 Dual Core at 1GHz
- 1 GiB DDR4 RAM
- 4MB Macronix mx25l3205d SPI flash
- 512MB Hynix H27U4G8F2DTR-BC NAND flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 2x SATA (hot swap slots)
- 3x buttons
- 10x LEDS
- serial console

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-02-13 10:14:50 +01:00
Tony Dinh
5c73428f4a arm: kirkwood: Use CONFIG_SYS_NS16550 with DM_SERIAL for Kirkwood boards
CONFIG_SYS_NS16550 is required when DM_SERIAL is enabled for
Kirkwood boards.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-02-13 10:14:50 +01:00
Ryan Chen
87f5b5d683 arm: aspeed: dtsi: add reg for i2c
The i2c driver have global register that i2c bus use
ofnode_get_parent to get parent register address.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-02-13 09:57:58 +01:00
Jade Lovelace
a5e490f14e socfpga: fix the serial console on DE1-SoC
Previously, the TX LED would flash but nothing would appear on the
serial port, and the board would appear dead with a build of the
socfpga_cyclone5_defconfig. I have verified that adding the frequency to
the uart will fix the serial console on my board.

Thanks to @ehoffman on the Rocketboards forum:
https://forum.rocketboards.org/t/cyclonev-programming-fpga-from-u-boot/2230/30

Signed-off-by: Jade Lovelace <lists@jade.fyi>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-02-12 15:47:19 -05:00
Dzmitry Sankouski
2ea062265f dts: add missing linux,code in gpio-keys
gpio-keys linux driver enforces user to specify linux,code.
Add missing linux,code before implementing button input support.

- arch/arm/dts/rk3288-popmetal.dtsi -> KEY_POWER
- arch/arm/dts/rk3288-tinker.dtsi -> KEY_POWER
- arch/arm/dts/am3517-evm-ui.dtsi -> KEY_RECORD
- sandbox/dts/sandbox.dtsi -> BTN_1
- sandbox/dts/sandbox.dts -> BTN_1

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-10 12:50:01 -05:00
Sumit Garg
baf0677b74 dts: qcs404-evb: Add I2C controller nodes
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
c9ec1971c6 pinctrl: qcs404: Enable I2C pinmux options
Co-developed-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
22d3fcd337 clock-snapdragon: Add clk_rcg_set_rate() with mnd_width=0
Add clk_rcg_set_rate() which allows to configure clocks without programming
MND values. This is required for configuring I2C clocks on QCS404.

Co-developed-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
de8f42c93a dts: qcs404-evb: Add ethernet controller node
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
56443285f2 pinctrl-snapdragon: Get rid of custom drive-strength values
Use standard pinconf drive-strength values from Linux DT bindings rather
than ones based on custom u-boot header. These changes are in direction
to make u-boot DTs for Qcom SoCs to be compatible with standard Linux
DT bindings.

Also, add support for pinconf bias-pull-up.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
c9062b3988 pinctrl: qcs404: Enable ethernet pinmux options
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
71ffa23fea clocks: qcs404: Add support for ethernet clocks
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
0d6def46e0 qcs404-evb: Enable msm_gpio driver support
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
881338a0c6 qcs404: sysmap: Don't map reserved memory ranges
Currently u-boot maps whole of 1G RAM but there reserved memory ranges on
QCS404 which are reserved for TrustZone, various firmware components etc.
Any access to these reserved memory ranges causes a bus hang issue. So
disable mapping for reserved memory ranges in u-boot.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Simon Glass
ce119a2706 Correct SPL uses of ROCKCHIP_OTP
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ROCKCHIP_OTP defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:41 -05:00
Simon Glass
41782a9c09 Correct SPL uses of FASTBOOT
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_FASTBOOT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:41 -05:00
Simon Glass
e7ec875dd1 Correct SPL use of SYS_FSL_ERRATUM_A010539
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SYS_FSL_ERRATUM_A010539 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
4610ae38d5 Correct SPL use of STM32MP15X_STM32IMAGE
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_STM32MP15X_STM32IMAGE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
4c77608942 Correct SPL uses of SAVE_PREV_BL_INITRAMFS_START_ADDR
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_SAVE_PREV_BL_INITRAMFS_START_ADDR defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
10f8bc0983 Correct SPL uses of SAVE_PREV_BL_FDT_ADDR
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_SAVE_PREV_BL_FDT_ADDR defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
3c9adeb330 Correct SPL uses of ROCKCHIP_EFUSE
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ROCKCHIP_EFUSE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
9dcf5ee586 Correct SPL uses of PMIC_STPMIC1
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_PMIC_STPMIC1 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
0ab3609061 Correct SPL uses of MTD
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_MTD defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:39 -05:00
Simon Glass
210af54947 Correct SPL uses of LMB
This converts 9 usages of this option to the non-SPL form, since there is
no SPL_LMB defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:39 -05:00
Simon Glass
24f95e141e Correct SPL uses of IMX_MODULE_FUSE
This converts 6 usages of this option to the non-SPL form, since there is
no SPL_IMX_MODULE_FUSE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:39 -05:00
Simon Glass
418f2173b1 Correct SPL use of EXYNOS7420
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_EXYNOS7420 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
f27a545b8f Correct SPL use of DISPLAY_CPUINFO
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_DISPLAY_CPUINFO defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
799e5be706 Correct SPL use of CMD_NET
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_CMD_NET defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
38223fb23f Correct SPL use of CMD_BOOTZ
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_CMD_BOOTZ defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:25 -05:00
Simon Glass
611e9af07c Correct SPL uses of ARMADA_8K
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ARMADA_8K defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:25 -05:00
Simon Glass
c1c5538e7e Correct SPL uses of ARMADA_3700
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ARMADA_3700 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:25 -05:00
Simon Glass
51864cdcbc Correct SPL uses of ALLEYCAT_5
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ALLEYCAT_5 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:25 -05:00
Simon Glass
c090ffb843 rmobile: Drop unused ehci-rmobile driver
This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:50 -05:00
Simon Glass
69f06c8da6 rmobile: Drop CONFIG_SH73A0 and associated code
This option does not exist, so the code attached to it is not used. Drop
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
dbcbbfd725 mtd: Drop unused CONFIG_S32V234
This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
ba9bb035a9 rmobile: Drop CONFIG_RMOBILE
This has been renamed to CONFIG_ARCH_RMOBILE but this one was left behind.
It doesn't point to a directory that exists, so just drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
9df5011e1e arm: Drop CONFIG_MMU
This option does not exist, so the #ifdefs do nothing. Drop this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Simon Glass
8742abedcf arm: Drop old kona code
The KONA and KONA_GPIO options don't exist anymore, since this commit:

   0f6807e77b0 arm: Remove bcm28155_ap board

Drop the dead code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Simon Glass
c4b25d5908 imx: Drop unused CONFIG_IMX
This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Simon Glass
4d4cdd4d19 rcar: Drop timer
Drop this unused driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00