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3 Commits

Author SHA1 Message Date
Xu Ziyuan
4711788267 usb: dwc2-otg: adjust fifo size via platform data 
The total FIFO size of some SoCs may be different from the existen, this
patch supports fifo size setting from platform data.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
 2016-07-25 20:44:19 -06:00
Xu Ziyuan
fab3357916 usb: rockchip-phy: implement USB2.0 phy control 
So far, Rockchip SoCs have two kinds of USB2.0 phy, such as Synopsys and
Innosilicon. This patch applys dwc2 usb driver framework to implement
phy_init() and phy_off() methods for Synopsys phy on Rockchip platform.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
 2016-07-25 20:44:19 -06:00
Marek Vasut
5d5716eebc usb: s3c-otg: Rename usb/s3c_udc.h to usb/dwc2_udc.h 
The driver is actually for the Designware DWC2 controller.
This patch renames the global s3c_udc.h header to dwc2_udc.h.

The rename is done automatically:
	$ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \
		`git grep "s3c_udc\.h" | cut -d : -f 1`

Signed-off-by: Marek Vasut <marex@denx.de>
 2015-12-17 21:54:41 +01:00