The NanoPi R2C Plus is a small variant of NanoPi R2C with a on-board
eMMC flash (8G) included.
The device tree is taken from the kernel v6.5.
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
To make automatic Rockchip DT syncing possible from Linux to U-boot prepare
rk3288.dtsi by moving to 64 bit reg size.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
xilinx:
- Enable NFS, WGET, DNS and BLKMAP by default
zynqmp:
- Support new power-management node
- Remove multiple blank lines from DTSes
- Wire multiboot with DFU infrastructure
- Fix i2c-gpio pinctrl group name
- SOM DT changes (phy on kd240, kv260 cleanups
- Cleanup i2c bus on zcu1285
- DT cleanup (fix node names not to use _)
- Fix USB interrupts
- Cleanup zcu100 DT
- Add support for kaslr-seed
zynqmp_r5:
- Fix W=1 issue with missing dir
tools:
- Improve zynqmpimage mkimage support
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Merge tag 'xilinx-for-v2024.04-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2024.04-rc1-v2
xilinx:
- Enable NFS, WGET, DNS and BLKMAP by default
zynqmp:
- Support new power-management node
- Remove multiple blank lines from DTSes
- Wire multiboot with DFU infrastructure
- Fix i2c-gpio pinctrl group name
- SOM DT changes (phy on kd240, kv260 cleanups
- Cleanup i2c bus on zcu1285
- DT cleanup (fix node names not to use _)
- Fix USB interrupts
- Cleanup zcu100 DT
- Add support for kaslr-seed
zynqmp_r5:
- Fix W=1 issue with missing dir
tools:
- Improve zynqmpimage mkimage support
Add pe2201 platform code and the device tree of pe2201 platform board.
The initial support comprises the UART and PCIe.
Signed-off-by: TracyMg_Li <TracyMg_Li@outlook.com>
Changes since v1:
fix space corrupt.
Changes since v2:
switch to bootstd and text environment.
Changes since v3:
add environment variables.
Add support for J721E HS-SE 2.0 device. Make use of the existing
templates and override the phandles for sysfw.itb so that builds do not
fail.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Qualcomm architecture changes:
* Move clock and pinctrl drivers out of mach-snapdragon
* Various clock driver improvements
* Convert PMIC power/reset key driver to use the button API
* Preparetory work for migrating to upstream DT
The core and chnl register ranges were swapped on SDM845. Fix it, and
fetch the register ranges by name instead of by index.
Drop the cosmetic "version" variable and clean up the debug logging.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Use the upstream gpio-ranges property instead of gpio-count, and drop
the bank-name property for Qualcomm boards.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The PMIC button driver is a much better representation of the hardware
here, adjust the boards to use upstream DT and the PMIC button driver
instead of exposing the buttons as GPIOs and relying on the GPIO-button
driver.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The pinctrl and GPIO drivers are currently heavily incompatible with
upstream. Most Qualcomm pinctrl blocks feature "tiles" of pins, each at
it's own address. Introduce support for these by allowing the soc driver
to specify per-pin register offsets similarly to the Linux driver.
Adjust the GPIO driver to handle these too, and finally enable support
for all pins with the same numbering as used in Linux.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Qualcomm's clock controller blocks actually do much more than it
says on the tin.. They provide clocks, resets and power domains.
Currently, U-Boot requires one to spawn 2 separate devices for
controlling clocks and resets, both spanning the same register space.
Refactor the code to make it work with just a single DT node, making
it compatible with upstream Linux bindings and dropping the dedicated
reset driver in favour of including it in the clock driver.
Heavily inspired by Renesas code for a similar hw block.
[caleb: moved drivers to clk/qcom, added reset driver and adjusted bind
logic. Imported qcom,gcc-ipq4019.h from Linux]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Synchronize R-Car R8A779F0 S4 DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Synchronize R-Car R8A77990 E3 DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Synchronize R-Car R8A77970 V3M DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Synchronize R-Car R8A7792 V2H DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
phyGATE-Tauri-L-iMX8MM is a Gateway based on the phycore-imx8mm SoM.
As a result, all the board code of the phycore-imx8mm is used.
Device tree synced with kernel v6.7.
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Remove already disabled node. GPIO connections are handled by pmufw that's
why there is no reason to have it described for non secure firmware.
If someone wants to handle it from OS revert this patch and also update
PMUFW configuration and pinctrl setting for these GPIO pins.
Link: https://lore.kernel.org/r/f26b1a780ec44444d62e2dd696a05e2a37fa0993.1704890056.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
There is a new eDPU revision that uses Marvell 88E6361 switch onboard.
We can rely on detecting the switch to enable and fixup the Linux DTS
so a single DTS can be used.
There is currently no support for the 88E6361 switch and thus no working
networking in U-Boot, so we disable both ports.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Add support for the Variscite VAR-SOM-IMX93 evaluation kit. The SoM
consists of an NXP iMX93 dual A55 CPU. The SoM is mounted on a Variscite
Symphony SBC.
Signed-off-by: Mathieu Othacehe <m.othacehe@gmail.com>
Add dedicated Makefile targets for the i.MX93 and a new imx93-u-boot.dtsi
device-tree to create binman images.
Signed-off-by: Mathieu Othacehe <m.othacehe@gmail.com>
Implement fdtdec_board_setup() auto-detection of ethernet PHY.
This uses properties of the hardware and pull resistor placement.
If GPIO1_16 RGMII_MDC is HIGH, then R530 (MX8MM eDM SBC) or
R390 (MX8MP eDM SBC) is populated. R530 or R390 is populated
only on boards with AR8031 PHY.
If GPIO1_16 RGMII_MDC is LOW, then the in-SoM pull down is the
dominant pull resistor. This is the case on boards with BCM54213PE
PHY.
In case AR8031 PHY is populated, the PHY MDIO address is 0, in
case BCM54213PE PHY is populated, the PHY MDIO address is 1, the
fdtdec_board_setup() is used to patch the correct address into
the U-Boot control DT.
Enable broadcom PHY support to support both PHYs.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
This restores support for IOT2050 by widely synchronizing its DT files
with the Linux kernel. We additionally need to add the alias restoration
that is still waiting for its upstream merge and the not-yet-upstreamed
bits needed for watchdog reboot detection.
Fixes: 4dbdc84754ea ("arm: dts: k3-am654: pull in dtb update from Linux")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Manorit Chawdhry <m-chawdhry@ti.com> says:
K3 devices have firewalls that are used to prevent illegal accesses to
memory regions that are deemed secure. The series prevents the illegal
accesses to ATF and OP-TEE regions that are present in different K3
devices.
AM62X, AM62AX and AM64X are currently in hold due to some firewall
configurations that our System Controller (TIFS) needs to handle.
The devices that are not configured with the firewalling nodes will not
be affected and can continue to work fine until the firewall nodes are
added so will be a non-blocking merge.
Test Logs: https://gist.github.com/manorit2001/4cead2fb3a19eb5d19005b3f54682627
CICD Run: https://github.com/u-boot/u-boot/pull/442
The following commits adds the configuration of firewalls required to
protect ATF and OP-TEE memory region from non-secure reads and
writes using master and slave firewalls present in our K3 SOCs.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Tested-by: Thomas Richard <thomas.richard@bootlin.com>
The following commits adds the configuration of firewalls required to
protect ATF and OP-TEE memory region from non-secure reads and
writes using master and slave firewalls present in our K3 SOCs.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
The following commits adds the configuration of firewalls required to
protect ATF and OP-TEE memory region from non-secure reads and
writes using master and slave firewalls present in our K3 SOCs.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
For readability during configuring firewalls, adding k3-security.h file
and including it in k3-binman.dtsi to be accessible across K3 SoCs
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Many nodes are reused between WKUP SPL, MAIN SPL, and U-Boot. Using
bootph-pre-ram is causing these nodes to be present in SPL builds but
pruned away during the U-Boot build. Convert these nodes to bootph-all
so they will remain no matter which dtb build is happening.
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
With the Linux and U-Boot board dtb files unified, we now have a
duplicate mcu secure proxy node. Remove it
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
The dummy_clock node is used to help the drivers probe the IO needed to
setup consoles and boot media to load firmware into the SoC.
This dummy_clock isn't a device that exists nor does it exist in the
mcu domain. So move it from cbass_mcu to the root node to avoid any
confusion.
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
These aliases are not needed in U-Boot. Remove them
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
