95478 Commits

Author SHA1 Message Date
Sughosh Ganu
8a9fc30f16 lmb: introduce a function to add memory to the lmb memory map
Introduce a function lmb_add_memory() to add available memory to the
LMB memory map. Call this function during board init once the LMB data
structures have been initialised.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-03 14:08:50 -06:00
Sughosh Ganu
6942bdb42a lmb: allow lmb module to be used in SPL
With the introduction of separate config symbols for the SPL phase of
U-Boot, the condition checks need to be tweaked so that platforms that
enable the LMB module in SPL are also able to call the LMB API's. Use
the appropriate condition checks to achieve this.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-09-03 14:08:50 -06:00
Sughosh Ganu
8281fdeec1 lmb: config: add lmb config symbols for SPL
Add separate config symbols for enabling the LMB module for the SPL
phase. The LMB module implementation now relies on alloced list data
structure which requires heap area to be present. Add specific config
symbol for the SPL phase of U-Boot so that this can be enabled on
platforms which support a heap in SPL.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-09-03 14:08:50 -06:00
Sughosh Ganu
e32bdd91f2 lmb: remove config symbols used for lmb region count
The LMB memory maps are now being maintained through a couple of
alloced lists, one for the available(added) memory, and one for the
used memory. These lists are not static arrays but can be extended at
runtime. Remove the config symbols which were being used to define the
size of these lists with the earlier implementation of static arrays.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-09-03 14:08:50 -06:00
Sughosh Ganu
5e9553cc72 lmb: allow for resizing lmb regions
Allow for resizing of LMB regions if the region attributes match. The
current code returns a failure status on detecting an overlapping
address. This worked up until now since the LMB calls were not
persistent and global -- the LMB memory map was specific and private
to a given caller of the LMB API's.

With the change in the LMB code to make the LMB reservations
persistent, there needs to be a check on whether the memory region can
be resized, and then do it if so. To distinguish between memory that
cannot be resized, add a new flag, LMB_NOOVERWRITE. Reserving a region
of memory with this attribute would indicate that the region cannot be
resized.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2024-09-03 14:08:50 -06:00
Sughosh Ganu
ed17a33fed lmb: make LMB memory map persistent and global
The current LMB API's for allocating and reserving memory use a
per-caller based memory view. Memory allocated by a caller can then be
overwritten by another caller. Make these allocations and reservations
persistent using the alloced list data structure.

Two alloced lists are declared -- one for the available(free) memory,
and one for the used memory. Once full, the list can then be extended
at runtime.

[sjg: Use a stack to store pointer of lmb struct when running lmb tests]

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
[sjg: Optimise the logic to add a region in lmb_add_region_flags()]
2024-09-03 14:08:50 -06:00
Sughosh Ganu
a368850ae2 lmb: use the BIT macro for lmb flags
Use the BIT macro for assigning values to the LMB flags instead of
assigning random values to them.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-09-03 14:08:49 -06:00
Sughosh Ganu
3d679aed62 lmb: staticize __lmb_alloc_base()
The __lmb_alloc_base() function is only called from within the lmb
module. Moreover, the lmb_alloc() and lmb_alloc_base() API's are good
enough for the allocation API calls. Make the __lmb_alloc_base()
function static.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-03 14:08:49 -06:00
Sughosh Ganu
f506ca00d6 lmb: remove the unused lmb_is_reserved() function
The lmb_is_reserved() API is not used. There is another API,
lmb_is_reserved_flags() which can be used to check if a particular
memory region is reserved. Remove the unused API.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-03 14:08:49 -06:00
Sughosh Ganu
c4eced2ec0 alist: add a helper to check if the list is full
Add a helper function to check if the alist is full. This can then be
used to extend the alist.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-03 14:08:49 -06:00
Tom Rini
2c832abc73 Merge patch series "net: dwc_eth_qos: Add glue driver for Intel MAC"
Philip Oberfichtner <pro@denx.de> says:

This patch series implements the dwc_eth_qos glue driver for Intel SOCs.
Before doing that, a few general adaptions to the dwc_eth_qos.c main
driver are required. Most notably, the preparation for PCI based driver
instances, which do not necessarily use a device tree.
2024-09-03 09:12:06 -06:00
Philip Oberfichtner
49d8fe07f9 net: dwc_eth_qos: Add glue driver for Intel MAC
Add dwc_eth_qos glue driver for the Intel Elkhart-Lake SOC.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
2024-09-03 09:12:00 -06:00
Philip Oberfichtner
2689b14ef3 net: dwc_eth_qos: Implement bind() for PCI devices
PCI devices do not necessarily use a device tree. Implement a bind()
function to assign unique device names in that case.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
2024-09-03 09:12:00 -06:00
Philip Oberfichtner
beabef6511 net: dwc_eth_qos: Adapt probe() for PCI devices
PCI devices do not necessarily use a device tree. In that case, the
driver currently fails to find eqos->config and eqos->regs.

This commit factors out the respective functionality. Device tree usage
remains default, but board specific implementations will be possible as
well.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
2024-09-03 09:12:00 -06:00
Philip Oberfichtner
14b237a8bd net: dwc_eth_qos: Fix header to be self-contained
Before this commit, usage of this header relied on a specific include
order. Fix it by including all dependencies.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2024-09-03 09:12:00 -06:00
Philip Oberfichtner
3eb7f46a3c x86: provide mb() macro
Implement a x86 memory barrier mb(). Furthermore, remove the previously
used mfence() function, which does the same thing.

The mb() macro is now equivalent to Linux (v6.9):
linux/arch/x86/include/asm/barrier.h

Signed-off-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-03 09:12:00 -06:00
Marek Behún
bc8664c9f3 arm: mvebu: turris_omnia: Switch DDR speed to 1333H when reset 9 is selected
Users experiencing random kernel crashes due to new versions of
Marvell's DDR training algorithm can solve the issue by setting DDR
speed to 1333H.

But if kernel crashes, it has to be done in U-Boot, which is impossible
without UART connection.

In order to make it easier for users, use the rescue button mechanism:
when rescue mode 9 is selected (that is when 10 LEDs are ON), U-Boot
will train DDR in 1333H mode and also update EEPROM so that subsequent
boot will use this mode.

User has to use the `eeprom` command in U-Boot or `omnia-eeprom` command
in OS to switch back to 1600K mode.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-09-03 14:24:32 +02:00
Marek Behún
c9da24184b arm: mvebu: turris_omnia: Use the i2c_eeprom misc driver for EEPROM reading in U-Boot proper
Use the i2c_eeprom miscellaneous driver for reading Turris Omnia EEPROM
in U-Boot proper. Keep using dm_i2c_read() in SPL build, since adding
the i2c_eeprom driver to SPL build increases the image by 1.5 KiB.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-09-03 14:24:32 +02:00
Marek Behún
1df8b54c1b arm: mvebu: turris_omnia: Rename variable holding EEPROM udevice
Rename the variable holding the EEPROM udevice from `chip` to `eeprom`.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-09-03 14:24:32 +02:00
Tom Rini
11beb9fe0f Merge tag 'u-boot-imx-next-20240902' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22211

- Enable SPI NOR flash support and MTD partitions for phycore_imx8mp.
- Convert mx6slevk to OF_UPSTREAM and watchdog DM.
- Cleanup some mx5/mx6 USB options.
- Make PLL settings configurable at board level.
- Set CONFIG_SPL_LOAD_FIT_ADDRESS for verdin-imx8m/p.
- Make the mxc-gpio reading state of GPIO pins in output mode to be
  consistent with the Linux kernel.
- Add HUK derivation support for ELE AHAB.
2024-09-02 16:03:02 -06:00
Tom Rini
b977af178f - meson_nand: R/W support for pages used by boot ROM
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Merge tag 'u-boot-amlogic-next-20240902' of https://source.denx.de/u-boot/custodians/u-boot-amlogic into next

- meson_nand: R/W support for pages used by boot ROM
2024-09-02 16:02:37 -06:00
Tom Rini
8c069df8dd Prepare v2024.10-rc4
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Merge tag 'v2024.10-rc4' into next

Prepare v2024.10-rc4
2024-09-02 14:13:57 -06:00
Tom Rini
1312faac5f Prepare v2024.10-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-09-02 14:07:53 -06:00
Marek Vasut
d134909722 ARM: imx: Wrap i.MX config options in MACH_IMX
Wrap all the i.MX specific options in MACH_IMX, otherwise they keep
showing up in other SoC vendor configurations. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-09-02 13:23:36 -03:00
Tom Rini
7fd4bfaa89 Minor fixes for qconfig and patman
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Merge tag 'dm-pull-1sep24' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

Minor fixes for qconfig and patman
2024-09-01 15:56:22 -06:00
Simon Glass
4597acbd59 qconfig: Fix an incorrect format-string with negative value
This is not allowed, so use ljust() instead. This fixes the
'qconfig -i -I help' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 1bd43060b3e ("moveconfig: Use f strings where possible")
2024-09-01 11:05:43 -06:00
Brian Norris
7b8f0bfa6e patman: Resolve python string vs. regex escaping syntax
Python strings have their own notion of backslash-escaping, and that can
conflict with the intentions for strings passed to the 're' module. In
particular, I get warnings like this:

tools/patman/../patman/commit.py:9: SyntaxWarning: invalid escape sequence '\s'
  re_subject_tag = re.compile('([^:\s]*):\s*(.*)')

We should use a raw string (r'...') so that all escaping is passed into
the regex module, not interpreted within the string itself.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-01 11:05:43 -06:00
Marek Vasut
412a6f3973 ARM: imx: Make PLL settings configurable at board level
Staticize intpll_configure(). Add weak board_imx_intpll_override()
function which can be defined at board level to override specific
PLL frequency settings early during boot. This can be used to for
example force faster CPU core clock frequency if the hardware can
handle it.

Example of increasing CPU core clock to 1600 MHz on i.MX8M Plus:
```
int board_imx_intpll_override(enum pll_clocks pll, ulong *freq)
{
       if (pll == ANATOP_ARM_PLL)
               *freq = MHZ(1600);
       return 0;
}
```

Signed-off-by: Marek Vasut <marex@denx.de>
2024-08-30 22:53:05 -03:00
Fabio Estevam
b16f6db637 imx: Remove CFG_MXC_USB_PORTSC
The definition of CFG_MXC_USB_PORTSC as (PORT_PTS_UTMI | PORT_PTS_PTW)
can be removed from mx5/mx6/mx7/mx8m board config files as it is the
default in drivers/usb/host/ehci-mx5.c and drivers/usb/host/ehci-mx6.c.

Suggested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
2024-08-30 22:47:04 -03:00
Fabio Estevam
183c218a80 mx5: Remove CFG_MXC_USB_PORT
CFG_MXC_USB_PORT is not used anywhere, so remove this unused symbol.

Suggested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2024-08-30 22:46:58 -03:00
Fabio Estevam
c17739f94f usb: ehci-mx5: Add a default for CFG_MXC_USB_PORTSC
Just like drivers/usb/host/ehci-mx6.c, add a default for
drivers/usb/host/ehci-mx5.c.

The motivation for doing this is to remove CFG_MXC_USB_PORTSC
from board config files.

All the mx5 boards, with the exeption of mx51evk, define
CFG_MXC_USB_PORTSC as:

 #define CFG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)

So move this definition as a default into ehci-mx5.c.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2024-08-30 22:46:52 -03:00
Fabio Estevam
14e6fcf462 imx: Remove CFG_MXC_USB_FLAGS
CFG_MXC_USB_FLAGS is only used for drivers/usb/host/ehci-mx5.c, so it
can be removed from all the imx6/imx7/imx8m board config files.

mx51evk.h is the only place CFG_MXC_USB_FLAGS is not set to 0.

Suggested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2024-08-30 22:46:45 -03:00
Rogerio Guerra Borin
4707913ebe configs: verdin-imx8m[mp]: set CONFIG_SPL_LOAD_FIT_ADDRESS
Set the CONFIG_SPL_LOAD_FIT_ADDRESS for both verdin-imx8mm and
verdin-imx8mp configurations to specify the load address for FIT images
loaded by the SPL.

As per lastest instructions from NXP, the generation of a HABv4 CSF
(Command Sequence File) requires the U-Boot FIT image (u-boot.itb) load
address to be set to a fixed value when binman is used. The address is
defined by CONFIG_SPL_LOAD_FIT_ADDRESS.

Here we set CONFIG_SPL_LOAD_FIT_ADDRESS to an address 64MB past the
start of the DDR memory leaving plenty of room for the various DDR-
residing artifacts to be moved to their usual load addresses which are
close to the start of the DDR.

Signed-off-by: Rogerio Guerra Borin <rogerio.borin@toradex.com>
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2024-08-30 22:32:35 -03:00
Tomas Paukrt
75e8b677b7 gpio: mxc_gpio: fix reading state of GPIO pins in output mode
The PSR register works correctly for GPIO pins in input mode,
but always returns 0 for GPIO pins in output mode unless the SION
bit is set.

The DR register should be used for GPIO pins in output mode
to allow correct getting of previously set output value.

Please note that the Linux gpio-mxc driver and the NXP U-Boot mxc_gpio
driver already use the DR register for all GPIO pins in output mode:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=442b2494b17d1a4f0a14721580271eb23ebffd42
4afc3f9094

Signed-off-by: Tomas Paukrt <tomaspaukrt@email.cz>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
2024-08-30 22:32:29 -03:00
Tom Rini
f0ec3e6089 Merge patch series "Add support for Ethernet Boot on SK-AM62"
Chintan Vankar <c-vankar@ti.com> says:

This series enables Ethernet Boot on SK-AM62 device.

This series is based on commit 'f4f845b85926' of origin/next branch of
U-Boot.

Logs for Ethernet Boot for AM625-SK:
https://gist.github.com/chintanv133/464782796a9a60b9f5a49e674c5fc31a
2024-08-30 15:55:06 -06:00
Chintan Vankar
d9de999ed5 arm64: dts: ti: k3-am62x-sk-common: Add bootph-all property in phy_gmii_sel node
Add missing bootph-all property for CPSW MAC's PHY node
phy_gmii_sel.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Link: https://lore.kernel.org/r/20240430085048.3143665-1-c-vankar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

[ upstream commit: ba50141137fae205a731005e70687f4a52289050 ]

(cherry picked from commit 2bdd1743a9f6515efe7c3648a25d63b4a9ce4a10)

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-08-30 13:57:40 -06:00
Siddharth Vadapalli
bdf6900fd6 arm: dts: k3-am625-r5-sk: Enable DM services for main_pktdma
Enable DM services for main_pktdma during R5 SPL stage.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
2024-08-30 13:57:40 -06:00
Kishon Vijay Abraham I
3b210e8069 configs: am62: Enable configs required for Ethboot
Enable config options needed to support Ethernet boot on AM62x SK.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
2024-08-30 13:57:40 -06:00
Kishon Vijay Abraham I
b4e0d3a62d configs: am62: Add configs for enabling ETHBOOT in R5SPL
Add configs for enabling ETHBOOT in R5SPL.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
2024-08-30 13:57:40 -06:00
Kishon Vijay Abraham I
35bddf8896 arm: mach-k3: am62x: am625_init: Probe AM65 CPSW NUSS
In order to support Ethernet boot on AM62x, probe AM65 CPSW NUSS
driver in board_init_f().

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
2024-08-30 13:57:39 -06:00
Kishon Vijay Abraham I
c78af98720 dma: ti: k3-udma: Add support for native configuration of chan/flow
In absence of Device Manager (DM) services such as at R5 SPL stage,
driver will have to natively setup TCHAN/RCHAN/RFLOW cfg registers.
Existing UDMA driver performed the above mentioned configuration
for UDMA. Add similar configuration for PKTDMA here.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
2024-08-30 13:57:39 -06:00
Chintan Vankar
eedfbb86c2 soc: ti: k3-navss-ringacc: Fix reconfiguration of qmode API
Function "k3_ringacc_ring_reconfig_qmode_raw()" should reset qmode to
requested value and should not update other fields in ring configuration
register.

Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-08-30 13:57:39 -06:00
Vignesh Raghavendra
963c13d133 soc: ti: k3-navss-ringacc: Fix reset ring API
Expectation of k3_ringacc_ring_reset_raw() is to reset the ring to
requested size and not to 0. Fix this.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
2024-08-30 13:57:39 -06:00
Kishon Vijay Abraham I
40710d3388 soc: ti: k3-navss-ringacc: Initialize base address of ring cfg registers
Initialize base address of ring config registers required to natively
setup ring cfg registers in the absence of Device Manager (DM) services
at R5 SPL stage. Since register property is defined as "ring" for PKTDMA
and "cfg" for UDMA, configure base address of ring configuration register
accordingly.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
2024-08-30 13:57:39 -06:00
Kishon Vijay Abraham I
48ea310771 firmware: ti_sci: Add No-OP for "RX_FL_CFG"
RX_FL_CFG message should not be forwarded to TIFS and should be
handled within R5 SPL (when DM services are not available). Add
a no-op function to not handle RX_FL_CFG messages.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
2024-08-30 13:57:39 -06:00
Chintan Vankar
62b096d907 common: spl: spl: Init DRAM size in R5/A53 SPL
Initialize DRAM size in SPL stage since networking requires DDR
to be initialized.

Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
2024-08-30 13:57:39 -06:00
Tomas Paukrt
ccda0ba461 lib: crypto: fix ASYMMETRIC_KEY_TYPE dependency
Fix the dependency to avoid a warning if RSA_VERIFY_WITH_PKEY is enabled.

Fixes: b7463f198da6 ("Make ASYMMETRIC_KEY_TYPE depend on FIT_SIGNATURE")
Signed-off-by: Tomas Paukrt <tomaspaukrt@email.cz>
2024-08-30 13:57:05 -06:00
Sughosh Ganu
be222ac029 list: use list_count_nodes() to count list entries
Use the API function list_count_nodes() to count the number of list
entries.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-08-30 13:51:38 -06:00
Fabio Estevam
61f64757ac mx6slevk: Convert to OF_UPSTREAM
Instead of using the local imx6sl-evk, imx6sl-pinfunc.h and
imx6sl.dtsi devicetree copies from U-Boot, convert the imx6sl-evk board
to OF_UPSTREAM so that the upstream kernel devicetree can be used instead.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2024-08-30 15:50:36 -03:00
Fabio Estevam
9521515405 mx6slevk: Keep a single defconfig
Remove mx6slevk_spinor_defconfig and mx6slevk_spl_defconfig in
favor of having a single mx6slevk_defconfig to help reducing
the maintenance effort.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2024-08-30 15:50:36 -03:00