6413 Commits

Author SHA1 Message Date
Christoph Stoidner
512c6b67a2 board: phytec: imx93: Add phyCORE-i.MX 93 support for all SOM variants
The phyCORE-i.MX 93 is available in various variants (e.g. different ram
sizes, eMMC HS400 yes/no). Enable hardware introspection for the
imx93-phyboard-segin_defconfig, so that during startup the SOM module
variant can be detected, and the hardware can be configured accordingly.
The resulting SPL and u-boot binary shall able to boot each
phyCORE-i.MX 93 module variant on each carrier board. Finally rename
imx93-phyboard-segin_defconfig to imx93-phycore_defconfig, to highlight
its SOM scope.

Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
2024-11-25 23:08:02 -03:00
Christoph Stoidner
d3b9b79968 board: phytec: imx93: Add eeprom-based hardware introspection
The phyCORE-i.MX 93 is available in various variants. Relevant variant
options for the spl/u-boot are:
- with or without HS400 support for the eMMC
- with 1GB ram chip, or 2GB ram chip

The phyCORE's eeprom contains all information about the existing variant
options. Add evaluation of the eeprom data to the spl/u-boot to
enable/disable HS400 and to select the appropriate ram configuration at
startup.

Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Primoz Fiser <primoz.fiser@norik.com>
2024-11-25 23:08:02 -03:00
Heiko Schocher
4d3b7cafab siemens: imx8-capricorn.dtsi: add wdt device
add wdt device

Signed-off-by: Heiko Schocher <hs@denx.de>
2024-11-25 23:07:37 -03:00
Heiko Schocher
ce2230dd69 siemens: imx8qxp-capricorn-u-boot.dtsi: fix boot
current generated flash.bin image does not longer
boot on cxg3 board.

Rename bootph-pre-ram to bootph-all so flash.bin
boots again!

Add u-boot specific change (add bootph-all property)
in A35_0 node to imx8qxp-capricorn-u-boot.dtsi

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
2024-11-25 23:07:37 -03:00
Enrico Leto
c8b3c46bde siemens: capricorn: move to cxg3 reference project with deneb board
We have many HW with capricorn i.MX8X boards. The difference in u-boot is
at all by the display of the LEDs.

* put upstream a reference project & board for DT and defconfig
* use the capricorn prefix outside the board/siemens/capricorn folder

Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
2024-11-25 23:07:37 -03:00
Heiko Schocher
645a42d7ee imx8qxp: Fix build when using SPL
imx8qxp based boards which use SPL drop error when
calling make all:
"""
Writing image to './flash.bin'
   Node '/binman/imx-boot/spl': GetData: size 0x0
       Node '/binman/imx-boot': GetPaddedDataForEntry: size 0x0
       Node '/binman/imx-boot': GetData: 1 entries, total size 0x0
       Node '/binman/imx-boot': GetPaddedDataForEntry: size 0x0
Wrote 0x0 bytes
Image 'imx-boot' is missing external blobs and is non-functional: spl

/binman/imx-boot/spl (spl.bin):
   Missing blob

Some images are invalid
"""

Guard creation of flash.bin with CONFIG_XPL_BUILD option.

Signed-off-by: Heiko Schocher <hs@denx.de>
Fixes: c9713c155127 ("imx8-u-boot: Fix SPL guard option")
2024-11-25 23:07:37 -03:00
Tom Rini
48380f9b2a Prepare v2025.01-rc3
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Merge tag 'v2025.01-rc3' into next

Prepare v2025.01-rc3
2024-11-25 17:34:08 -06:00
Marek Vasut
c02cdd4187 arm64: dts: imx8mn: Include 32kHz oscillator clock in SPL DTs
Since 50cdd3f74af3 ("clk: imx: clk-imx8mn Fix nand and spi clock parent"),
drivers/clk/imx/clk-imx8mn.c clk_get_by_name(dev, "osc_24m", &osc_24m_clk)
fails with error -22 EINVAL in SPL. This is because clk_get_by_name() in the
end calls fdtdec_parse_phandle_with_args(), which iterates over all phandles
in clock-controller@30380000 { clocks = <&osc_32k>, <&osc_24m>, ... } node
'clocks' property in an attempt to find the "osc_24m" clock, but fails to
resolve the &osc_32k phandle and returns with -EINVAL.

Include the osc_32k clock in SPL DTs as a low risk fix for v2025.01 release.
This way, fdtdec_parse_phandle_with_args() can resolve both the osc_32k and
following osc_24m phandle and successfully look up the osc_24m clock.

Fixes: 50cdd3f74af3 ("clk: imx: clk-imx8mn Fix nand and spi clock parent")
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mn-beacon
2024-11-23 15:46:34 -03:00
Tom Rini
7fe55182d9 AMD/Xilinx changes for v2025.01-rc3
microblaze:
 - Disable JFFS2
 
 fpga:
 - pass compatible flag to fpga_load()
 
 zynqmp:
 - SOM RTC fix
 - SC(system controller) PMW polarity fix
 - Fix ram_top calculation with introducing XILINX_MINI
 - Fix RPU release command
 
 versal:
 - Enable capsule update
 - Enable soft reset and Micron octal flashes
 
 xilinx:
 - Align Kconfig regarding SPI_STACKED_PARALLEL
 
 bootcount:
 - Add new zynqmp driver
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Merge tag 'xilinx-for-v2025.01-rc3-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.01-rc3:

- microblaze:
  - Disable JFFS2
- fpga:
  - pass compatible flag to fpga_load()
- zynqmp:
  - SOM RTC fix
  - SC(system controller) PMW polarity fix
  - Fix ram_top calculation with introducing XILINX_MINI
  - Fix RPU release command
- versal:
  - Enable capsule update
  - Enable soft reset and Micron octal flashes
- xilinx:
  - Align Kconfig regarding SPI_STACKED_PARALLEL
- bootcount:
  - Add new zynqmp driver
2024-11-19 12:58:05 -06:00
Tom Rini
a45d823c02 Merge patch series "Apply SoM overlays on phyCORE-AM6xx SoMs"
Wadim Egorov <w.egorov@phytec.de> says:

Our SoMs are available in multiple configurations, managed via device
tree overlays. To determine the specific variant in use, we read the
EEPROM and apply the appropriate overlays during boot to the device tree
used by the OS.

Apply overlays for phyCORE-AM62x and phyCORE-AM64x SoMs.
Future K3 SoMs will be able to reuse this logic and overlays.

Link: https://lore.kernel.org/r/20241030164815.1763506-1-w.egorov@phytec.de
2024-11-14 10:49:51 -06:00
Wadim Egorov
e09fabad2e arm: dts: k3-am642-phycore-som-binman: Add SoM overlays
Include SoM dt-overlays that handle variants of our SoMs into
u-boot's FIT image.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2024-11-14 10:46:22 -06:00
Wadim Egorov
9f57a5bad1 arm: dts: k3-am625-phycore-som-binman: Add SoM overlays
Include SoM dt-overlays that handle variants of our SoMs into
u-boot's FIT image.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2024-11-14 10:46:22 -06:00
Tom Rini
030ec147af - khadas-vim3{l}: fix userdata size for android config
- drop A1 dtsi and other bindings includes in favor of Upstream ones
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Merge tag 'u-boot-amlogic-next-20241113' of https://source.denx.de/u-boot/custodians/u-boot-amlogic into next

- khadas-vim3{l}: fix userdata size for android config
- drop A1 dtsi and other bindings includes in favor of Upstream ones
2024-11-14 10:39:17 -06:00
Alexey Romanov
ea2273911d arm: dts: meson: remove meson-a1.dtsi
For Amlogic A1, we have to use dtsi from dts/upstream folder.
The only difference between this two files is the added cpu temperature
node definition in upstream version and additional assigned-clock for
USB. This patch is tested on a device with A113L SoC (AD401-like) and
everything is okay.

So, we can remove legacy arch/arm/dts/meson-a1.dtsi file.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Link: https://lore.kernel.org/r/20241112125836.3239832-2-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-11-13 17:25:07 +01:00
Marek Vasut
3cd3e0aa06 ARM: dts: stm32: Sort DH STM32 DHCOM DTSI
Sort the DTSI alphabetically. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-11-12 14:18:35 +01:00
Marek Vasut
2e5ebcfa6b ARM: dts: stm32: Drop duplicate pinmux on DH STM32 DHCOM
The ethernet0_rmii_pins_a pinmux change has no effect on any
DHSOM based hardware. The mco2_pins_a and mco2_sleep_pins_a
are both part of stm32mp15-pinctrl.dtsi . Drop both pinmux
changes.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-11-12 14:09:09 +01:00
Marek Vasut
635e9483c8 ARM: dts: stm32: Drop remnants of upstream DT switch on DH STM32 DHSOM
Remove unused local DT copies after the OF_UPSTREAM conversion.

Fixes: cccb29fc1270 ("ARM: dts: stm32: Switch to using upstream DT on DH STM32 DHSOM")
Reported-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-11-12 12:57:36 +01:00
Saeed Nowshadi
7aeed221db arm64: zynqmp: Fix pwm-fan polarity
In previous version of pwm driver, the polarity of pwm were implemented
in reverse.  In recent release, that issue in the driver is fixed,
therefore, correctly set the polarity in the device tree.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3e8e38b77101335f86bca0f05b3988877bb12993.1729766551.git.michal.simek@amd.com
2024-11-12 09:01:46 +01:00
Michal Simek
4de127a44a arm64: zynqmp: Configure SoC RTC on SOM
Use RTC available in HW on Kria SOM without using emulation that's why
configure it properly and disable emulated one.
Power on reset value of RTC Calibration register without battery backup is
not matching with crystal frequency which leads to RTC time drift. That's
why write CALIB_WRITE register with crystal frequency (0x7FFF). There is
also an option to write zero so that Linux will set default value (0x7FFF)
in driver probe but calibration 0 is not permited by DT schema.

Co-developed-by: Srinivas Goud <srinivas.goud@amd.com>
Signed-off-by: Srinivas Goud <srinivas.goud@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9b684faeec85381b9b8fe796aaebc2ee79f17b8e.1729663761.git.michal.simek@amd.com
2024-11-12 09:01:46 +01:00
Tom Rini
fdcf06d58d Merge tag 'u-boot-rockchip-20241111' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/23280

- Add board:
        rk3328: FriendlyElec NanoPi R2S Plus
        rk3568: Qnap TS433
        rk3588: Cool Pi CM5 GenBook
- Move rk3399_force_power_on_reset to TPL for puma board;
2024-11-11 07:25:25 -06:00
Jonas Karlman
3133b7c645 board: rockchip: Add FriendlyElec NanoPi R2S Plus
The FriendlyElec NanoPi R2S Plus is a single-board computer based on
Rockchip RK3328 SoC. It features e.g. 1 GB DDR4 RAM, 32 GB eMMC,
SD-card, 2x GbE LAN, optional M.2 SDIO Wi-Fi and 2x USB 2.0 host.

Features tested on a NanoPi R2S Plus 2309:
- SD-card boot
- eMMC boot
- Ethernet
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Andy Yan
dfcd4afd4c board: rockchip: Add support for rk3588 GenBook
Add support for Cool Pi GenBook, it works as a carrier board
connect with CM5 SOM.

Specification:
- Rockchip RK3588
- LPDDR5X 8/32 GB
- eMMC 64 GB
- HDMI Type A out x 1
- USB 3.0 Host x 1
- USB-C 3.0 with DisplayPort AltMode
- PCIE M.2 E Key for RTL8852BE Wireless connection
- PCIE M.2 M Key for NVME connection
- eDP panel with 1920x1080

Tested by Armbian boot on USB disk.

Change-Id: I4d9b8572dc7c400077dde666633f3fea1b47dd03
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Heiko Stuebner
d3cacb79e7 board: rockchip: add support for Qnap TS433 devices
The Qnap TS433 is a 4-bay NAS based around the RK3568.

Two SATA bays are connected to the RK3568's own SATA controllers while
the other two are connected to a JMicron SATA controller living on the
PCIe bus.

It provides one 2.5Gb and one 1Gb ethernet port as well as 3 usb ports.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Lad Prabhakar
5fb5ed2f78 board: hoperun: Switch to use complete DTS files from upstream DTS
For upstream Linux kernel we use below DTBs for HiHope boards:
- r8a774a1-hihope-rzg2m-ex.dtb
- r8a774e1-hihope-rzg2h-ex.dtb
- r8a774b1-hihope-rzg2n-ex.dtb

Update the CONFIG_OF_LIST to match the above. Now that we have switched
upstream DTS, drop deleting the nodes and also rename the
r8a774*-u-boot.dtsi files to r8a774*-ex-u-boot.dtsi to match the OF_LIST
files so that the `bootph-all` property gets applied to required nodes
in upstream DTS.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
2024-11-10 19:38:46 +01:00
Paul Barker
db3b17db5c ARM: dts: Drop unused RZ/G2L devicetrees
We are now using the dts/upstream subtree for the RZ/G2L SoC family so
we can drop unused devicetree files from arch/arm/dts.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-11-10 19:36:38 +01:00
Marek Vasut
354e33d06c ARM: dts: imx: Switch to using upstream DT on DH i.MX6 DHCOM
Enable OF_UPSTREAM to use upstream DT and add nxp/imx/ prefix to the
DEFAULT_DEVICE_TREE. And thereby directly build DTB from dts/upstream/src/
including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-11-09 08:54:35 -03:00
Manorit Chawdhry
84610b66e1 arch: arm: dts: k3-j784s4-r5: Introduce k3-j784s4-r5.dtsi
Create an SoC R5 dtsi file that could be used at board level R5 files. This
would help in keeping the SoC level changes in sync across board files.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2024-10-30 13:02:04 -06:00
Tom Rini
5cca0e3f6e Merge tag 'u-boot-imx-master-20241029' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/23092

- Implement i.MX93 erratum fix on the dwc_eth_qos driver to fix RMII.
- Add support for Emcraft Systems NavQ+.
- Fix the size of IVT + CSF blob tacked on to u-boot.itb.
2024-10-29 18:46:08 -06:00
Tom Rini
e28e70e392 Merge patch series "Support Aspeed SGPIO controller"
Billy Tsai <billy_tsai@aspeedtech.com> says:

AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
with 80 pins, AST2500/AST2400 SoC has 1 SGPIO master interface that
supports up to 80 pins.

Link: https://lore.kernel.org/r/20241016085955.314236-1-billy_tsai@aspeedtech.com
2024-10-29 16:17:47 -06:00
Gilles Talis
1beb665c50 board: emcraft: Add support for Emcraft Systems NavQ+
The Emcraft Systems NavQ+ kit is a mobile robotics platform
based on NXP i.MX8 MPlus SoC.

The following interfaces and devices are enabled:
- eMMC
- Gigabit Ethernet (through eQOS interface)
- SD-Card
- UART console

The device tree file is taken from upstream Linux Kernel
through OF_UPSTREAM

Signed-off-by: Gilles Talis <gilles.talis@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2024-10-29 16:25:25 -03:00
Billy Tsai
4d5510774d ARM: dts: ast2600: Add SGPIO to device tree
Add SGPIO DTS node and enable them for AST2600 EVB.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
2024-10-29 12:12:04 -06:00
Billy Tsai
be298254be ARM: dts: ast2500: Add SGPIO to device tree
Add SGPIO DTS node and enable it for AST2500 EVB.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
2024-10-29 12:12:04 -06:00
Tom Rini
1466ff7d83 Merge patch series "boards: siemens: iot2050: SM variant, sysinfo support, fixes & cleanups"
Jan Kiszka <jan.kiszka@siemens.com> says:

This adds support for the new IOT2050 SM variant, introduces a sysinfo
driver which also permits SMBIOS support and switches the board to
OF_UPSTREAM. There are some further fixes for the boards included as well.

Not yet included is configuration support for DMA isolation via the PVU as
this depends on not yet merged DT bindings and another overlay.

[trini: This is just the first 10 patches in the series for now]

Link: https://lore.kernel.org/r/cover.1729577070.git.jan.kiszka@siemens.com
2024-10-29 10:05:30 -06:00
Baocheng Su
3acd534b73 board: iot2050: Support new IOT2050-SM variant
Main differences between the new variant and Advanced PG2:

1. Arduino interface is removed. Instead, an new ASIC is added for
   communicating with PLC 1200 signal modules.
2. USB 3.0 type A connector is removed, only USB 2.0 type A connector is
   available.
3. DP interface is tailored down. Instead, to communicate with the
   PLC 1200 signal modules, a USB 3.0 type B connector is added but the
   signal is not USB.
4. DDR size is increased to 4 GB.
5. Two sensors are added, one tilt sensor and one light sensor.

Signed-off-by: Baocheng Su <baocheng.su@siemens.com>
[Jan: rebased over OF_UPSTREAM]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2024-10-29 10:05:25 -06:00
Jan Kiszka
5341318165 board: siemens: iot2050: Migrate to OF_UPSTREAM
This requires some tweaking of the defconfig and
board_fit_config_name_match so that the new sources are taken into
account.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2024-10-28 20:54:23 -06:00
Jan Kiszka
90d1b4ae30 board: siemens: iot2050: Stop using special spl DT sources
We can simply use the default DT, Basic PG1, because no nodes that are
different between the variants play a role for SPL. Will help with the
migration to OF_UPSTREAM.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2024-10-28 20:54:23 -06:00
Tom Rini
2800aecce0 Merge patch series "Implement ACPI on aarch64"
Patrick Rudolph <patrick.rudolph@9elements.com> says:

Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testing of the proposed
solution.

The series is split into ACPI cleanups and code movements, adding
Arm specific ACPI tables and finally SoC and mainboard related
changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the
mandatory ACPI tables are supported, allowing to boot into Linux
without errors.

The QEMU SBSA support is feature complete and provides the same
functionality as the EDK2 implementation.

The changes were tested on real hardware as well on QEMU v9.0:

qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \
                    -pflash secure-world.rom \
                    -pflash unsecure-world.rom

qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \
-smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \
-dtb bcm2711-rpi-4-b.dtb -nographic

Tested against FWTS V24.03.00.

Known issues:
- The QEMU rpi4 support is currently limited as it doesn't emulate PCI,
  USB or ethernet devices!
- The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly
  cache related).
- PCI on RPI4 isn't working on real hardware since the pcie_brcmstb
  Linux kernel module doesn't support ACPI yet.

Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
2024-10-27 18:44:13 -06:00
Patrick Rudolph
6d722894fd board: emulation: Add QEMU sbsa support
Add support for Arm sbsa [1] v0.3+ that is supported by QEMU [2].

Unlike other Arm based platforms the machine only provides a minimal
FDT that contains number of CPUs, ammount of memory and machine-version.
The boot firmware has to provide ACPI tables to the OS.
Due to this design a full DTB is added here as well that allows U-Boot's
driver to properly function. The DTB is appended at the end of the U-Boot
image and will be merged with the QEMU provided DTB.

In addition provide documentation how to use, enable binman to fabricate both
ROMs that are required to boot and add ACPI tables to make it full compatible
to the EDK2 reference implementation.

The board was tested using Fedora 40 Aarch64 Workstation. It's able
to boot from USB and AHCI or network.

Tested and found working:
- serial
- PCI
- xHCI
- Bochs display
- AHCI
- network using e1000e
- CPU init
- Booting Fedora 40

1: Server Base System Architecture (SBSA)
2: https://www.qemu.org/docs/master/system/arm/sbsa.html

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Cc: Peter Robinson <pbrobinson@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2024-10-27 17:24:13 -06:00
Tom Rini
8963d433eb Merge tag 'u-boot-rockchip-20241026' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/22993

- New boards:
        rk3566: Hardkernel ODROID-M1S
        rk3588s: Hardkernel ODROID-M2
        rk3588: NanoPC-T6 LTS
- Migrate to use USB_DWC3_GENERIC for rk3328
- Other board level config and dts update
2024-10-26 08:10:31 -06:00
Jonas Karlman
7cec3e7019 rockchip: rk3588-nanopc-t6: Add support for NanoPC-T6 LTS
Update defconfig to enable features included in pending upstream DT and
implement board_fit_config_name_match() to load correct DT for LTS and
non-LTS version of the NanoPC-T6.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:48 +08:00
Jonas Karlman
d1c38bb4a8 rockchip: rk3588-nanopc-t6: Drop upstream props from u-boot.dtsi
The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes from u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:48 +08:00
Jonas Karlman
44c923e5a7 rockchip: rk3399-pinephone-pro: Drop upstream props from u-boot.dtsi
The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes in u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Jonas Karlman
1308505974 rockchip: rk3588-rock-5b: Drop upstream props from u-boot.dtsi
The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes in u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Tom Rini
47423b81c2 Merge tag 'u-boot-imx-master-20241025a' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22989

- Remove unneeded USB board code and fix reset on mx6ul_14x14_evk.
- Update fastboot buffer size/address for verdin-imx8m{m|p}.
- Fix imxrt1050-evk boot and convert it to standard boot.
- Fix imx8qxp-mek and imx8qm-mek boot.
- Add support for the i.MX93 9X9 QSB board.
- Make livetree API to work on i.MX.
- Set sane default value for i.MX8M SPL_LOAD_FIT_ADDRESS.
- Deduplicate DH i.MX8MP/i.MX6 DHSOM defconfigs.
- Select default TEXT_BASE for i.MX6/i.MX7.
- Several updates for DH i.MX8MP DRC02.
2024-10-25 18:51:05 -06:00
Jesse Taube
4bc57d7f34 ARM: dts: imxrt1170: Fix default cells value warnings
Add #address-cells and #size-cells to the memory node to fix warnings

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2024-10-25 20:13:02 -03:00
Jesse Taube
1a8d89b7ab imx: imxrt1050-evk: Fix missing clocks for mmc
Two of the clocks required by the usdhc1 controller are missing from the
clock controller node. A recent change enables all the clocks in the
esdhc node, which fails as they are not defined in the clock controller.

Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API")
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
2024-10-25 20:11:24 -03:00
Jonas Karlman
352cec9a05 board: rockchip: Add Hardkernel ODROID-M1S
The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.

Features tested on a ODROID-M1S 8GB rev1.0 20230906:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:50:47 +08:00
Jonas Karlman
bcc7eefa4c board: rockchip: Add Hardkernel ODROID-M2
The Hardkernel ODROID-M2 is a single-board computer based on Rockchip
RK3588S2 SoC. It features e.g. 8/16 GB LPDDR5 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0/Type-C.

Features tested on a ODROID-M2 16GB rev1.0 20240611:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:49:12 +08:00
Chris Morgan
7344fa41a2 board: rockchip: Convert Anbernic RGxx3 to OF_UPSTREAM
Refactor the board detection logic (again) to make it compatible with
the upstream device-trees, and switch to OF_UPSTREAM.

Now the device boots with the device-tree for the 353P, and then
loads the correct device tree (of 10) in the later stages of SPL.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:48:40 +08:00
FUKAUMI Naoki
698e5830aa arm: dts: rockchip: turn LEDs on at boot for Radxa boards
Basically, Radxa's boards are intended to turn LEDs on at U-Boot.
add `default-state = "on"` to u-boot.dtsi.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:46:40 +08:00