804 Commits

Author SHA1 Message Date
Jonas Karlman
39389cfb3d rockchip: rk3308: Implement checkboard() to print SoC variant
Implement checkboard() to print current SoC variant used by a board,
e.g. one of:

  SoC:   RK3308
  SoC:   RK3308B
  SoC:   RK3308B-S

when U-Boot proper is running.

  U-Boot 2025.01-rc1 (Nov 02 2024 - 20:26:25 +0000)

  Model: Radxa ROCK Pi S
  SoC:   RK3308B
  DRAM:  512 MiB (effective 510 MiB)

Information about the SoC variant is read from GRF.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2025-01-10 18:56:22 -06:00
Jonas Karlman
1c2ffcd5e6 rockchip: rk3588: Implement checkboard() to print SoC variant
Implement checkboard() to print current SoC model used by a board,
e.g. one of:

  SoC:   RK3582
  SoC:   RK3588
  SoC:   RK3588J
  SoC:   RK3588S
  SoC:   RK3588S2

when U-Boot proper is running.

  U-Boot 2025.01-rc1 (Nov 10 2024 - 00:31:29 +0000)

  Model: Generic RK3588S/RK3588
  SoC:   RK3588S2
  DRAM:  8 GiB

Information about the SoC model and variant is read from OTP.

Also update rk3588s-u-boot.dtsi to include OTP in U-Boot pre-reloc phase,
where checkboard() is called.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:22 -06:00
Jonas Karlman
1a520a9b20 rockchip: rk356x: Implement checkboard() to print SoC variant
Implement checkboard() to print current SoC model used by a board,
e.g. one of:

  SoC:   RK3566
  SoC:   RK3566T
  SoC:   RK3568
  SoC:   RK3568B2
  SoC:   RK3568J

when U-Boot proper is running.

  U-Boot 2025.01-rc1 (Nov 10 2024 - 00:39:37 +0000)

  Model: Generic RK3566/RK3568
  SoC:   RK3568J
  DRAM:  8 GiB (effective 7.7 GiB)

Information about the SoC model and variant is read from OTP.

Also update rk356x-u-boot.dtsi to include OTP in U-Boot pre-reloc phase,
where checkboard() is called.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:22 -06:00
Jonas Karlman
af518a1dfe rockchip: rk3399: Drop unneeded bob and kevin board specific code
The IO-domain driver will configure io_vsel and always-on/boot-on
regulators will be enabled based on the board device tree now that
required nodes and Kconfig options is enabled for SPL.

Remove the bob and kevin board specific code from the common rk3399.c,
the IO-domain and regulator driver provide similar functionality.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2025-01-10 18:56:21 -06:00
Jonas Karlman
51b3e46363 rockchip: rk3399: Drop common Kconfig options already implied
The last two RK3399 boards, chromebook bob and kevin, have now migraded
to use common bss and stack addresses.

Cleanup and remove Kconfig options no longer needed in rk3399/Kconfig
when all boards now use common bss and stack addresses.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:21 -06:00
Jonas Karlman
4576e65a5d rockchip: rk3399: Fix TPL build of bob and kevin
Building chromebook_bob/kevin with TPL=y ends with a linking error:

  arch/arm/mach-rockchip/rk3399/rk3399.o: in function `board_debug_uart_init':
  arch/arm/mach-rockchip/rk3399/rk3399.c:148:(.text.board_debug_uart_init+0x34):
    undefined reference to `spl_gpio_output'
  arch/arm/mach-rockchip/rk3399/rk3399.c:148:(.text.board_debug_uart_init+0x34):
    relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `spl_gpio_output'

  make[2]: *** [scripts/Makefile.xpl:542: tpl/u-boot-tpl] Error 1
  make[1]: *** [Makefile:2134: tpl/u-boot-tpl] Error 2
  make: *** [Makefile:568: __build_one_by_one] Error 2

Change to only use spl_gpio functions in SPL to fix this.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:18 -06:00
Johan Jonker
43728edfc2 rockchip: use OF_UPSTREAM for rk3066a/rk3188
The device tree for rk3066a/rk3188 combined is now
available in the /dts/upstream directory.
Use imply OF_UPSTREAM to migrate all rk3066a/rk3188 boards.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:17 -06:00
FUKAUMI Naoki
e1661639d9 rockchip: Add support for Radxa ROCK 5C
Radxa ROCK 5C[1] is a Rockchip RK3588S2 based single board computer.

[1] https://radxa.com/products/rock5/5c

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:17 -06:00
Jonas Karlman
14c13f295a rockchip: rk3288-firefly: Use common bss and stack addresses
Migrate to use common bss, stack and malloc heap size and addresses to
unify memory use in TPL, SPL and pre-reloc.

ENV_OFFSET is using the default value of 0x3f8000 and is also dropped.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:15 -06:00
Jonas Karlman
1e3e3534a9 rockchip: rk3288-firefly: Drop unused SPL_LED related code
The firefly-rk3288_defconfig build target does not enable the SPL_LED
Kconfig option.

Drop the unused SPL_LED related code and replace it with a default-state
prop to ensure the LED driver enable the LED at U-Boot proper phase.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:15 -06:00
Jacobe Zang
c990398674 board: rockchip: add Khadas Edge2 RK3588 board
Khadas Edge2 is a Rockchip RK3588S based SBC (Single Board Computer)
by Khadas.

There are tree variants depending on the DRAM size : 8G and 16G.

Specification:

    Rockchip RK3588S SoC
    4x ARM Cortex-A76, 4x ARM Cortex-A55
    8/16GB memory LPDDR4x
    Mali G610MP4 GPU
    3x MIPI CSI 4x lanes
    2x MIPI-DSI DPHY 4x lanes
    32/64GB eMMC
    1x USB 2.0, 1x USB 3.0, 2x USB-Type-C
    1x HDMI 2.1 output, 1x DP 1.4 output
    USB PD over USB Type-C

Kernel commit:
04d552993522 ("arm64: dts: rockchip: Add Khadas edge2 board")

Signed-off-by: Jacobe Zang <jacobe.zang@wesion.com>
2025-01-10 18:56:15 -06:00
Jonas Karlman
68412a237f rockchip: rk3288-miqi: Use TPL with common bss and stack addresses
Migrate to use TPL, common bss, stack and malloc heap size and addresses
to unify memory use in TPL, SPL and pre-reloc.

ENV_OFFSET is using the default value of 0x3f8000 and is also dropped.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:15 -06:00
Jonas Karlman
826267d3ea rockchip: rk3288-tinker: Use common bss and stack addresses
Migrate to use common bss, stack and malloc heap size and addresses to
unify memory use in TPL, SPL and pre-reloc.

Ensure SYS_MALLOC_F_LEN and TPL variant stay at 0x2000 and is unaffected
on other boards not changed to use common malloc heap size.

ENV_OFFSET is using the default value of 0x3f8000 and is also dropped.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10 18:56:15 -06:00
Quentin Schulz
0a17123ded rockchip: rk3399: move sysreset-gpio logic to TPL
If TPL_GPIO and TPL_PINCTRL_ROCKCHIP are enabled and a sysreset-gpio is
provided in the TPL Device Tree, this will trigger a system reset
similar to what's currently been done in SPL whenever the RK3399 "warm"
boots. Because there's currently only one user of sysreset-gpio logic,
and TPL is enabled on that board, so let's migrate the logic and that
board to do it in TPL.

There are three reasons for moving this earlier:
- faster boot time as we don't need to reach SPL to be able to reset the
  system on a condition we know is already met in TPL,
- have less code to be impacted by the issue this system reset works
  around (that is, "unclean" SoC registers after a reboot),
- less confusion around the reason for restarting. Indeed when done from
  SPL, the following log can be observed:

"""
U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45)
Channel 0: DDR3, 666MHz
BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
Channel 1: DDR3, 666MHz
BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
256B stride
Trying to boot from BOOTROM
Returning to boot ROM...

U-Boot SPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45 +0100)
Trying to boot from MMC2

U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45)
"""

possibly hinting at an issue within the SPL when loading the fitImage
from MMC2 instead of the normal course of events (a system reset).

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:15 +08:00
Quentin Schulz
7461d55ca7 rockchip: tpl: allow to call board/SoC-specific code before DRAM init
This defines a weak tpl_board_init function that can be used for running
board/SoC-specific code before the DRAM init happens, similarly to
spl_board_init() for SPL.

Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:15 +08:00
Quentin Schulz
b21fd44c84 rockchip: rk3399: merge CRU check within rk3399_force_power_on_reset
To prepare to support forcing power on reset from TPL which would have
the exact same logic, just in an earlier stage, let's merge the CRU
check that triggers the power on reset with the rest of the logic.

Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Andy Yan
dfcd4afd4c board: rockchip: Add support for rk3588 GenBook
Add support for Cool Pi GenBook, it works as a carrier board
connect with CM5 SOM.

Specification:
- Rockchip RK3588
- LPDDR5X 8/32 GB
- eMMC 64 GB
- HDMI Type A out x 1
- USB 3.0 Host x 1
- USB-C 3.0 with DisplayPort AltMode
- PCIE M.2 E Key for RTL8852BE Wireless connection
- PCIE M.2 M Key for NVME connection
- eDP panel with 1920x1080

Tested by Armbian boot on USB disk.

Change-Id: I4d9b8572dc7c400077dde666633f3fea1b47dd03
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Heiko Stuebner
d3cacb79e7 board: rockchip: add support for Qnap TS433 devices
The Qnap TS433 is a 4-bay NAS based around the RK3568.

Two SATA bays are connected to the RK3568's own SATA controllers while
the other two are connected to a JMicron SATA controller living on the
PCIe bus.

It provides one 2.5Gb and one 1Gb ethernet port as well as 3 usb ports.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Alex Shumsky
ed4ae73862 rockchip: board: Increase rng-seed size to make it sufficient for modern Linux
Increase rng-seed size to make Linux happy and initialize rng pool instantly.
Linux 5.19+ requires 32 bytes of entropy to initialize random pool, but u-boot
currently provides only 8 bytes.
Linux 5.18 and probably some versions before it used to require 64 bytes.
Bump min value to 64 bytes to be on a safe side.

Boot with 8 byte rng-seed (Linux 6.11):
    # dmesg | grep crng
    [   12.089286] random: crng init done
Boot with 32 byte rng-seed (Linux 6.11):
    # dmesg | grep crng
    [    0.000000] random: crng init done

Linux source references:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/char/random.c?h=v5.19#n551
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/char/random.c?h=v5.18#n236

Signed-off-by: Alex Shumsky <alexthreed@gmail.com>
Fixes: d2048bafae40 ("rockchip: board: Add board_rng_seed() for all Rockchip devices")
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Jonas Karlman
352cec9a05 board: rockchip: Add Hardkernel ODROID-M1S
The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.

Features tested on a ODROID-M1S 8GB rev1.0 20230906:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:50:47 +08:00
Jonas Karlman
bcc7eefa4c board: rockchip: Add Hardkernel ODROID-M2
The Hardkernel ODROID-M2 is a single-board computer based on Rockchip
RK3588S2 SoC. It features e.g. 8/16 GB LPDDR5 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0/Type-C.

Features tested on a ODROID-M2 16GB rev1.0 20240611:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:49:12 +08:00
Daniel Semkowicz
3edf14413d rockchip: rk3399: Weaken dependency on SPL serial
Allow to disable serial console in SPL. Weak dependency is already used
with TPL serial.

Signed-off-by: Daniel Semkowicz <dse@thaumatec.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:48:59 +08:00
Chris Morgan
55f6d05350 board: rockchip: Enable PD_VO before driver access
Enable the PD_VO power domain before driver access on the rk3568 SoC.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:48:41 +08:00
Tom Rini
47e544f576 Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"
Simon Glass <sjg@chromium.org> says:

When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL

Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.

For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:

   #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)

In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.

This series starts a change in terminology and usage to resolve the
above issues:

- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
  'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
  defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_

It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.

This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.

The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
2024-10-11 12:23:25 -06:00
Simon Glass
5c10c8badf global: Rename SPL_TPL_ to PHASE_
Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.

Update the comment in bootstage to refer to this symbol, instead of
SPL_

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
bef9fdbed2 arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Marek Vasut
6f52feee28 power: regulator: Drop regulators_enable_boot_on/off()
Both regulators_enable_boot_on/off() are unused and superseded by
regulator uclass regulator_post_probe(). Remove both functions.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-09-30 19:19:07 -06:00
Caleb Connolly
58d825fb18 include: export uuid.h
Move this header to include/u-boot/ so that it can be used by external
tools.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-09-12 17:35:37 +02:00
Simon Glass
001b3109da rockchip: Move the default timer init to a common file
Rather than repeating the same code in two files (SPL and TPL), move it
to a shared filed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-08-23 15:58:41 -06:00
Heiko Stuebner
d27c3431ae board: rockchip: Add Radxa ROCK 5 ITX
The Rock 5 ITX is a board in ITX form factor using the RK3588 SoC

It can be powered either by 12V, ATX power-supply or PoE.

Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.2 E-key slot,
2*2.5Gb PCIe-connected Ethernet NICs.

Display options are 2*HDMI, DP via USB-c, eDP + 2*DSI via PCB connectors.

USB ports are 4*USB3 + 2*USB2 on the back panel and 2-port front-panel
connector.

Schematics for the board can be found on
- https://dl.radxa.com/rock5/5itx/radxa_rock_5_itx_X1100_schematic.pdf
- https://dl.radxa.com/rock5/5itx/v1110/radxa_rock_5itx_v1110_schematic.pdf

The naming scheme with the dashes follows Dragan's comment on the mainline
devicetree commit:
    "the name of this board deviates from the standard Radxa naming scheme,
     which is something like "ROCK <number><letter>" thus, "rock-5a" is
     fine, but it should be "rock-5-itx", simply because there's a space
     between "5" and "ITX" in "ROCK 5 ITX"

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2024-08-12 15:43:44 +08:00
Jonas Karlman
5bc8209e1b board: rockchip: Add FriendlyElec CM3588 NAS
The CM3588 NAS by FriendlyElec pairs the CM3588 compute module, based
on the Rockchip RK3588 SoC, with the CM3588 NAS Kit carrier board.

Features tested on a CM3588 NAS Kit with 8GB RAM 64GB eMMC module:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-08-09 18:35:24 +08:00
Ricardo Pardini
a52099b4a2 board: rockchip: Add Xunlong Orange Pi 3B
The Xunlong Orange Pi 3B is a single-board computer based on the
Rockchip RK3566 SoC.

The two hw revisions use different io-voltage for Ethernet PHY and can
be identified using GPIO4_C4:
- v1.1.1: x (internal pull-down)
- v2.1:   PHY_RESET (external pull-up)

Implement rk_board_late_init() to set correct fdtfile env var and
board_fit_config_name_match() to load correct FIT config based on what
board is detected at runtime so a single board target can be used for
both hw revisions.

Minimal DTs that includ DT from dts/upstream is added to support booting
from both hw revision and only set Ethernet PHY io-voltage when the hw
revision is detected at runtime. A side-affect of this is that defconfig
show OF_UPSTREAM=n, however dts/upstream DTs is used for this board.

Features tested on Orange Pi 3B 4GB (v1.1.1 and v2.1):
- SD-card boot
- eMMC boot
- SPI Flash boot
- Ethernet
- PCIe/NVMe
- USB host

Signed-off-by: Ricardo Pardini <ricardo@pardini.net>
Co-developed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-08-09 18:35:24 +08:00
Jonas Karlman
5d199ad9a6 board: rockchip: Add Radxa ZERO 3W/3E
The Radxa ZERO 3W/3E is an ultra-small, high-performance single board
computer based on the Rockchip RK3566, with a compact form factor and
rich interfaces.

Implement rk_board_late_init() to set correct fdtfile env var and
board_fit_config_name_match() to load correct FIT config based on what
board is detected at runtime so a single board target can be used for
both board models.

Features tested on a ZERO 3W 8GB v1.11:
- SD-card boot
- eMMC boot
- USB gadget
- USB host

Features tested on a ZERO 3E 4GB v1.2:
- SD-card boot
- Ethernet
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-08-09 18:35:23 +08:00
Jonas Karlman
28a0c18458 rockchip: io-domain: Add support for RK3308
Port the RK3308 part of the Rockchip IO Domain driver from linux.

This differs from linux version in that vccio3 iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supply that have been configured.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-08-09 18:35:23 +08:00
Tom Rini
b81e31a1e6 bootstash: Do not provide a default address for all
A valid memory location to stash bootstage information at will be
architecture dependent. Move the existing defaults to the main Kconfig
file for this option and set 0x0 as the default only for sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-19 16:48:07 -06:00
FUKAUMI Naoki
e8b3f6c101 configs: rockchip: imply OF_LIBFDT_OVERLAY for rk3308 and rk3328
for rk3308, all defconfigs have CONFIG_OF_LIBFDT_OVERLAY=y, so enable it
by default.

for rk3328, any defconfig doesn't have it. but there is no strong reason
not to enable it. at least it's required for ROCK Pi E.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-07-17 16:26:55 +08:00
Sebastian Kropatsch
7db9ff1648 board: rockchip: Add FriendlyElec NanoPi R6S
The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip RK3588s.
It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC storage,
one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports, one USB 2.0
Type-A and one USB 3.0 Type-A port, a HDMI port, a 12-pin GPIO FPC
connector, a fan connector, IR receiver as well as some buttons and LEDs.

Add initial support for this board using the upstream devicetree sources.

Kernel commit:
f1b11f43b3e9 ("arm64: dts: rockchip: Add support for NanoPi R6S")

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
2024-07-17 14:48:18 +08:00
Sebastian Kropatsch
f59d40aa55 board: rockchip: Add FriendlyElec NanoPi R6C
The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip RK3588s.
It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB eMMC
storage, one M.2 M-Key connector, one RTL8211F 1GbE and one RTL8125
2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0 Type-A port, a
HDMI port, a 30-pin GPIO header as well as multiple buttons and LEDs.

Add initial support for this board using the upstream devicetree sources.

Tested in U-Boot proper:
- Booting from eMMC works
- 1GbE Ethernet works using the eth_eqos driver (tested by ping)
- 2.5GbE Ethernet works using the eth_rtl8169 driver (tested by ping),
  but the status LEDs on this specific port currently aren't working
- NVMe SSD in M.2 socket does get recognized (tested with `nvme scan`
  followed by `nvme details`)

Kernel commit:
d5f1d7437451 ("arm64: dts: rockchip: Add support for NanoPi R6C")

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
2024-07-17 14:48:18 +08:00
Quentin Schulz
bb986d9e12 rockchip: remove support for Theobroma Systems RK3368 Lion
No meaningful changes were made to this SoM since February 2021. Nobody
from Theobroma has booted anything recent on that product since July
2021 at the latest. The product isn't available to buy anymore and
disappeared from our website.

This product is therefore unmaintained and it would be disingenuous to
say the opposite, so drop support for RK3368 Lion.

If you're a user of Lion, feel free to revert this patch or contact our
sales/support department.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-07-17 14:48:18 +08:00
Quentin Schulz
008cc3d746 rockchip: px30: bind sub-nodes for GRF (syscon)
There are some sub-nodes under the grf DT nodes, so add bind callback
function in syscon_px30 driver to scan them recursively.

Fixes: e9ccb2f526ed ("rockchip: add px30 architecture core")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-07-17 11:54:38 +08:00
Quentin Schulz
b8790017eb rockchip: px30: imply ARMV8_CRYPTO
PX30 supports ARMv8 Cryptography Extensions so let's enable it by
default for all PX30 to make FIT verification when enabled much faster.

While A35 shouldn't be impacted by ARMV8_SET_SMPEN cache coherency
according to the Kconfig help text, let's enable it just in case since
it exists in the documentation[1].

For u-boot part of the FIT image, it is now taking 5ms against currently
35ms. fdt-1 check lowered from 3ms to <1ms. atf-1 from 6ms to <1ms.

[1] https://developer.arm.com/documentation/100236/0100/register-descriptions/aarch64-system-registers/cpu-extended-control-register--el1?lang=en

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-07-17 11:54:23 +08:00
Quentin Schulz
f0d356610b rockchip: add support for Theobroma Systems SOM-RK3588-Q7 Tiger module
The RK3588-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3588.

It provides the following feature set:
 * up to 16GB LPDDR4x
 * on-module eMMC
 * SD card (on a baseboard) via edge connector
 * Gigabit Ethernet with on-module GbE PHY
 * HDMI/eDP
 * MIPI-DSI
 * 4x MIPI-CSI (3x on FPC connectors, 1x over Q7)
 * HDMI input over FPC connector
 * CAN
 * USB
   - 1x USB 3.0 dual-role (direct connection)
   - 2x USB 3.0 host + 1x USB 2.0 host
 * PCIe
   - 1x PCIe 2.1 Gen3, 4 lanes
   - 2xSATA / 2x PCIe 2.1 Gen1, 2 lanes
 * on-module ATtiny816 companion controller, implementing:
   - low-power RTC functionality (ISL1208 emulation)
   - fan controller (AMC6821 emulation)
 * on-module Secure Element with Global Platform 2.2.1 compliant
   JavaCard environment

The support is added for Tiger on Haikou devkit, similarly to RK3399
Puma and PX30 Ringneck.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-06-14 17:13:36 +08:00
Jianfeng Liu
40b573e4f6 board: rockchip: add ArmSoM Sige7 Rk3588 board
ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by
ArmSoM.

There are two variants depending on the DRAM size : 8G and 16G.

Specification:

    Rockchip Rk3588 SoC
    4x ARM Cortex-A76, 4x ARM Cortex-A55
    8/16GB memory LPDDR4x
    Mali G610MC4 GPU
    2x MIPI CSI 2 multiple lanes connector
    64GB/128GB on board eMMC
    uSD slot
    1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
    1x HDMI 2.1 output
    2x 2.5 Gbps Ethernet port
    40-pin IO header including UART, SPI and I2C
    USB PD over USB Type-C
    Size: 92mm x 62mm

Kernel commit:
81c828a67c78 (arm64: dts: rockchip: Add ArmSom Sige7 board)

Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-06-14 17:11:05 +08:00
Quentin Schulz
f087f7fd27 rockchip: px30/rk3326: migrate to OF_UPSTREAM
Migrate PX30/RK3326 boards that exists in Linux v6.8 to use OF_UPSTREAM.

firefly-px30 is not migrated to OF_UPSTREAM because there's no Device
Tree in the Linux kernel.

Differences between U-Boot's Odroid-Go2 and Linux's are now moved to the
-u-boot.dtsi, though I have a gut feeling that the existing cru
overrides aren't necessary (anymore?).

The U-Boot GPIO led-0 is on GPIO0_C1 but such is the pin of PWM3 which
is used for Linux's PWM led-2 so keep Linux's.

I also doubt vcc_cam is actually used, though the Odroid-Go2 Black
Edition uses this dcdc regulator for WiFi, so let's just move it to the
-u-boot.dtsi to play it safe.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-06-14 17:10:42 +08:00
Ilias Apalodimas
c1eb7a993d arm: move _end to linker symbols
commit 6e2228fb052b ("Merge patch series "Clean up arm linker scripts")
was cleaning up linker scripts for armv7 and v8 but was leaving
_end and __secure_stack_start/end.

commit d0b5d9da5de2 ("arm: make _end compiler-generated")
was moving _end to be compiler generated. _end is defined as c variable
in its own section to force the compiler emit relative a reference.
However, defining those in the linker script will do the same thing
since [0].

So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols.
It's worth noting that _image_binary_end symbol is now redundant and
can be removed in the future.

- SPL

The .end section has been removed from the new binary
[ 5] .end
     PROGBITS         00000000fffdf488  000000000002f488  0
     0000000000000000 0000000000000000  0                 1
     [0000000000000003]: WRITE, ALLOC

$~ bloat-o-meter kria_old/spl/u-boot-spl krina_new/spl/u-boot-spl
add/remove: 0/0 grow/shrink: 0/0 up/down: 0/0 (0)
Function                                     old     new   delta
Total: Before=115980, After=115980, chg +0.00%

$~ readelf -sW kria_old/u-boot kria_new/u-boot | grep -w _end
 12047: 000000000813a0f0     0 OBJECT  GLOBAL DEFAULT   11 _end
 12047: 000000000813a118     0 NOTYPE  GLOBAL DEFAULT   11 _end

$~ readelf -sW kria_old/spl/u-boot-spl kria_new/spl/u-boot-spl | grep -w _end
  1605: 00000000fffdf488     0 OBJECT  GLOBAL DEFAULT    5 _end
  1603: 00000000fffdf498     0 NOTYPE  GLOBAL DEFAULT    4 _end

$~ readelf -sW old/u-boot new/u-boot | grep -w _end
  8847: 0000000000103710     0 OBJECT  GLOBAL DEFAULT   11 _end
  8847: 0000000000103738     0 NOTYPE  GLOBAL DEFAULT   11 _end

$~ readelf -sW old_v7/u-boot new_v7/u-boot | grep -w _end
 10638: 000da824     0 OBJECT  GLOBAL DEFAULT   10 _end
 10637: 000da84c     0 NOTYPE  GLOBAL DEFAULT   10 _end

- For both QEMU instances
$~ bloat-o-meter old/u-boot new/u-boot
add/remove: 0/0 grow/shrink: 1/0 up/down: 20/0 (20)
Function                                     old     new   delta
version_string                                50      70     +20
Total: Before=656915, After=656935, chg +0.00%

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-06-07 16:20:29 -06:00
Tom Rini
227be29df3 Prepare v2024.070-rc4
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Merge tag 'v2024.07-rc4' into next

Prepare v2024.070-rc4
2024-06-04 08:09:09 -06:00
Chris Morgan
5c7caa9598 board: rockchip: Add Indiedroid Nova
The Indiedroid Nova is a Rockchip RK3588S based SBC from Indiedroid.

Specifications:

    Rockchip RK3588S SoC
    4x ARM Cortex-A76, 4x ARM Cortex-A55
    4/8/16GB memory LPDDR4x
    Mali G610MC4 GPU
    Optional eMMC
    2x USB 2.0, 2x USB 3.0, 1x USB 3.0 C port with DP Alt
    1x MIPI-CSI Port (4-lane or 2x 2-lane)
    1x MIPI-DSI 4-lane connector
    1x Micro HDMI 2.1 output, 1x DP 1.4 output
    Gigabit Ethernet
    Realtek RTL8821CS WiFi
    4 pin debug UART connector
    40 pin GPIO header
    Size: 85mm x 56mm (Raspberry Pi Form Factor)

Kernel commit:
3900160e164b ("arm64: dts: rockchip: Add Indiedroid Nova board")

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-25 10:28:19 +08:00
Chris Morgan
2c04d6ede4 board: rockchip: add Powkiddy X55
The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device.
UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this
successfully boots mainline Linux.

Kernel commit:
e99adc97e21a ("arm64: dts: rockchip: Add Powkiddy X55")

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-25 10:28:05 +08:00
Quentin Schulz
ed4b0ce247 rockchip: Use common bss and stack addresses on PX30
See commit 008ba0d56d00 ("rockchip: Add common default bss and stack
addresses") for memory layout. This migrates PX30 to use the new layout,
except for TPL. Indeed, PX30 is extremely limited in SRAM, so we need to
be extra careful about what goes into the TPL and how much we can
allocate there, so let's keep the current value for
TPL_SYS_MALLOC_F_LEN (already present in the PX30-specific Kconfig, from
an earlier commit).

This will allow us to use the same memory layout on one more Rockchip
SoC, which is always a nice thing. Additionally, this will make it
easier to fix U-Boot proper pre-reloc running out of memory on PX30 in a
subsequent commit.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-05-24 17:58:59 +08:00
Quentin Schulz
78d1f04fa6 rockchip: px30: default TPL_SYS_MALLOC_F_LEN to 0x600 on PX30 Kconfig level
This is the kind of setting that typically doesn't need to be changed
between boards based on the same SoC, so let's make it the default in
PX30 Kconfig so we don't have to care about it in the defconfig if we
don't want to.

Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-05-24 17:58:59 +08:00