27219 Commits

Author SHA1 Message Date
Fabio Estevam
8ad6ac9fbd mx6: Expand bmode to support ecspi3 boot
Currently, the bmode command only supports booting from ecspi1.

Expand it to also support booting from ecspi3.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
2024-08-23 14:50:15 -03:00
Fabio Estevam
3c72b81200 tqma6_mba6: Remove UART board code
With DM_SERIAL in place, there is no need to setup the UART pins
in the board code.

The UART pins are setup via devicetree, thanks to DM.

Remove the unneeded code.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2024-08-23 14:49:44 -03:00
Primoz Fiser
8827ec575e imx: imx9: Set correct critical temperature
Commit 3233349fa6e2 ("imx: imx9: fixup thermal trips from fuses")
wrongly set critical temperature to (maxc - 5) instead of maxc.

Fixes: 3233349fa6e2 ("imx: imx9: fixup thermal trips from fuses")
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2024-08-23 14:49:26 -03:00
Tom Rini
e93d343cc7 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-samsung into next 2024-08-22 08:15:04 -06:00
Tom Rini
158cf0270c Prepare v2024.10-rc3
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Merge tag 'v2024.10-rc3' into next

Prepare v2024.10-rc3
2024-08-19 18:24:58 -06:00
Tom Rini
f9e45be1a1 Merge patch series "clk: mediatek: mt7986: clk migration for OF_UPSTREAM"
Christian Marangi <ansuelsmth@gmail.com> says:

These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
2024-08-19 16:15:13 -06:00
Christian Marangi
54f8ba658f clk: mediatek: mt7986: rename CK to CLK
Rename each entry from CK to CLK to match the include in upstream kernel
linux.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2024-08-19 16:14:44 -06:00
Christian Marangi
ba7969c5fb clk: mediatek: mt7986: convert to unified infracfg gates + muxes
Convert to infracfg gates + muxes implementation now that it's
supported.

Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:44 -06:00
Christian Marangi
7124b9928a clk: mediatek: mt7986: drop 1/1 spurious factor for topckgen
Now that we can have advanced parent handling for mux, we can drop
spurious topckgen 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7986.

Drop the factor entry from mt7986-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the apmixed clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for apmixed.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:43 -06:00
Christian Marangi
1062187a4b clk: mediatek: mt7986: rename TOPCKGEN factor clock to upstream naming
Rename TOPCKGEN factor clock to upstream neaming.
Upstream kernel linux reference the factor clock for apmixedpll with the
"pll" suffix. Align the naming to the upstream naming format in
preparation for OF_UPSTREAM support.

Also rename rtc clock to drop the CB_ as upstream doesn't have that.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:43 -06:00
Christian Marangi
6df8029c9e clk: mediatek: mt7986: drop 1/1 infracfg spurious factor
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7986.

Drop the factor entry from mt7986-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for infracfg and topckgen.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:43 -06:00
Christian Marangi
e69a1fed16 clk: mediatek: mt7986: rename CB_CKSQ_40M to TOP_XTAL
Upstream kernel linux clock include use TOP_XTAL instead of CB_CKSQ_40M.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:43 -06:00
Tom Rini
2f71d6ef32 Merge patch series "clk: mediatek: mt7988: clk migration for OF_UPSTREAM"
Christian Marangi <ansuelsmth@gmail.com> says:

These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
2024-08-19 16:14:29 -06:00
Christian Marangi
99c5fa184b clk: mediatek: mt7988: rename CK to CLK
Rename each entry from CK to CLK to match the include in upstream kernel
linux.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2024-08-19 16:14:09 -06:00
Christian Marangi
ef4a648587 clk: mediatek: mt7988: convert to unified infracfg gates + muxes
Convert to infracfg gates + muxes implementation now that it's
supported.

Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:09 -06:00
Christian Marangi
8b75c2c479 clk: mediatek: mt7988: rename TOPCKGEN factor clock to upstream naming
Rename TOPCKGEN factor clock to upstream neaming.
Upstream kernel linux reference the factor clock for apmixedpll with the
"pll" suffix. Align the naming to the upstream naming format in
preparation for OF_UPSTREAM support.

Also rename rtc clock to drop the CB_ as upstream doesn't have that.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:09 -06:00
Christian Marangi
78507c3a9f clk: mediatek: mt7988: drop 1/1 infracfg spurious factor
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7988.

Drop the factor entry from mt7988-clk.h and reference to them in
mt7988.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:09 -06:00
Christian Marangi
b76b75bfc6 clk: mediatek: mt7988: rename CB_CKSQ_40M to TOP_XTAL
Upstream kernel linux clock include use TOP_XTAL instead of CB_CKSQ_40M.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:09 -06:00
Tom Rini
98cccbd680 Merge patch series "clk: mediatek: mt7981: clk migration for OF_UPSTREAM"
Christian Marangi <ansuelsmth@gmail.com> says:

These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
2024-08-19 16:13:57 -06:00
Christian Marangi
02de3b9f04 clk: mediatek: mt7981: rename CK to CLK
Rename each entry from CK to CLK to match the include in upstream kernel
linux.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
99da5bbd80 clk: mediatek: mt7981: convert to unified infracfg gates + muxes
Convert to infracfg gates + muxes implementation now that it's
supported.

Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
2d20cc4064 clk: mediatek: mt7981: fix support for pwm3 clock
Add and fix support for pwm3 clock. In the pwm DTSI node we were
actually using PWM2 clock for PWM3. Now that we have correct ID also add
the missing entry of gate and mux to support PWM3 clock.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
78487cd093 clk: mediatek: mt7981: drop 1/1 spurious factor
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7981.

Drop the factor entry from mt7981-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for infracfg and topckgen.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
807624c1e1 clk: mediatek: mt7981: implement sgmii0/1 clock
Implement missing sgmii0/1 clock and update the compatible the DTS to
match upstream kernel linux and in preparation for OF_UPSTREAM support
since the ethernet node define these additional clocks.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
f8a58bb2b5 clk: mediatek: mt7981: swap wrong clock-names for spi nodes
Swap wrong clock-names for spi nodes as they were wrong and the spi-clk
was referencing the sel-clk and the sel-clk was referencing the spi-clk.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
37476e7eae clk: mediatek: mt7981: add missing clock for spi1 node
Add missing clock for spi1 node. Clocks taken from upstream clock
definition and clock mux.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
99bd00a97c clk: mediatek: mt7981: fix wrong clock definition for spi2
Fix wrong clock definition for spi2 node as they reference spi0 clock
instead of spi2.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
99d3da81bd clk: mediatek: mt7981: fix typo for infra_i2c0_ck
Fix a typo for infra_i2c0_ck where 0 was misspelled as O.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Sam Protsenko
4a29c0d36b arm: dts: exynos: Remove outdated DW MMC properties in all Exynos dts
Upstream properties were added to device trees to follow current Linux
kernel. DW MMC driver was updated accordingly. Safely remove outdated
MMC properties. Details on removed properties are as follows:

* samsung,removable: replaced by non-removable
* samsung,bus-width: replaced by bus-width
* samsung,timing:
  - replaced by samsung,dw-mshc-ciu-div and samsung,dw-mshc-sdr-timing
    in dw_mmc nodes
  - removed from sdhci nodes (it's neither described in bindings, nor
    it's used in s5p_sdhci.c driver)
* fifoth_val: replaced by fifo-depth
* bus_hz: replaced by clock-frequency
* div: the fixed CIU clock divider value was moved to the chip data in
  exynos_dw_mmc.c driver

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-08-19 16:09:06 +09:00
Sam Protsenko
9bedead15a mmc: exynos_dw_mmc: Improve coding style
Fix most of checkpatch warnings and other obvious style issues.

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-08-19 16:09:06 +09:00
Sam Protsenko
9780ca6539 mmc: exynos_dw_mmc: Add support for ARM64 Exynos chips
Add the compatible entry and corresponding chip data for Exynos7
compatible chips, which covers modern ARM64 based Exynos chips. They
have some differences w.r.t. old ARM32 Exynos chips:
  - CLKSEL register offset is different
  - 64-bit IDMAC descriptor and 64-bit IDMAC registers are used
    (implemented in dw_mmc core driver)

In terms of the driver implementation, the CIU clock is obtained via CCF
framework (as opposed to ad-hoc clock driver implementation for ARM32
chips).

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-08-19 16:09:06 +09:00
Sam Protsenko
29b4ff362a arm: exynos: Add header guard for dwmmc.h
Add missing header guard to prevent possible build errors.

Fixes: 77b55e8cfcee ("ARM: exynos: move SoC sources to mach-exynos")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-08-19 16:09:06 +09:00
Sam Protsenko
d1c057fd49 arm: dts: exynos: Add upstream DW MMC properties to all Exynos dts
Some device tree properties for DW MMC block were updated in Linux
kernel. Let's follow its example and rework corresponding properties in
all Exynos device trees. Don't remove outdated properties yet, it'll be
done later once DW MMC driver is updated accordingly to read the updated
properties instead of outdated ones.

Next properties are added:

* samsung,dw-mshc-ciu-div and samsung,dw-mshc-sdr-timing:

  They were derived from outdated samsung,timing property.

* fifo-depth (generic replacement for fifoth_val):

  FIFO depth was calculated from fifoth_val (using expressions from
  FIFOTH register description in TRM):

      fifo-depth = ((fifoth_val >> 16) + 1) * 2

* bus-width: generic replacement for samsung,bus-width
* clock-frequency: generic replacement for bus_hz
* non-removable: generic replacement for samsung,removable = <0>

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-08-19 16:09:06 +09:00
Richard Weinberger
c17b2a05dd x86: Fix ptrdiff_t for x86_64
sbrk() assumes ptrdiff_t is large enough to enlarge/shrink the heap
by LONG_MIN/LONG_MAX.
So, use the long type, also to match the rest of the Linux ecosystem.

Signed-off-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-08-15 16:14:36 -06:00
Andrew Davis
b39248732a arm: dts: keystone: Move to OF_UPSTREAM
Enable OF_UPSTREAM for Keystone boards. Remove DT files that
are now available in dts/upstream.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Neha Malcom Francis <n-francis@ti.com>
2024-08-15 14:26:59 -06:00
Fabio Estevam
a640267cc4 imx6-tqma6: Convert to OF_UPSTREAM
Instead of using the local imx6-tqma6 devicetree copies from U-Boot,
convert the imx6-tqma6 target to OF_UPSTREAM so that the upstream
kernel devicetrees can be used instead.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2024-08-13 09:31:04 -03:00
Fabio Estevam
a4c707f56b tqma6q_mba6: Convert to watchdog driver model
Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.

Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2024-08-13 09:30:44 -03:00
Max Krummenacher
9ef9d90147 imx: imx8: fix build when CONFIG_IMX_BOOTAUX is set
Use correct function name.

Fixes: e8cd1f60d964 ("imx: imx8: bootaux: Add i.MX8 M4 boot support")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
2024-08-13 08:28:24 -03:00
Gary Bisson
6967be34dc imx8ulp_evk: enable binman support
Enable binman support and add documentation for the
imx8ul-evk board.

Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
2024-08-13 08:28:24 -03:00
Gary Bisson
9970da6fd0 mach-imx: Add i.MX 8ULP binman support
- Re-use i.MX 93 Makefile target as similar boot process
- Create imx8ulp-u-boot.dtsi for binman image architecture
- Create both SPL and U-Boot containers configuration

Key differences between the 93 and 8ULP SPL container are:
- No LPDDR training library needed for 8ULP
- 8ULP requires a uPower binary (RISC-V core) for power management
- 8ULP also requires a M33 binary to work properly

Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2024-08-13 08:28:24 -03:00
Simon Glass
b76f37ce63 octeon: Drop OCTEON_I2C_FDT dead code
This option is not defined by any board, so drop the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2024-08-13 06:14:44 +02:00
FUKAUMI Naoki
9c6d3ce3b4 arm: dts: rockchip: remove upstreamed props for Radxa ROCK 5B
"usb_host1_xhci" and related node were already upstreamed. remove
unnecessary properties from u-boot.dtsi.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-08-12 15:44:04 +08:00
FUKAUMI Naoki
d9b010731e arm: dts: rockchip: remove upstreamed props for Radxa ROCK 3A
"sfc" node was already upstreamed. remove unnecessary properties from
u-boot.dtsi.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-08-12 15:44:04 +08:00
Heiko Stuebner
d27c3431ae board: rockchip: Add Radxa ROCK 5 ITX
The Rock 5 ITX is a board in ITX form factor using the RK3588 SoC

It can be powered either by 12V, ATX power-supply or PoE.

Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.2 E-key slot,
2*2.5Gb PCIe-connected Ethernet NICs.

Display options are 2*HDMI, DP via USB-c, eDP + 2*DSI via PCB connectors.

USB ports are 4*USB3 + 2*USB2 on the back panel and 2-port front-panel
connector.

Schematics for the board can be found on
- https://dl.radxa.com/rock5/5itx/radxa_rock_5_itx_X1100_schematic.pdf
- https://dl.radxa.com/rock5/5itx/v1110/radxa_rock_5itx_v1110_schematic.pdf

The naming scheme with the dashes follows Dragan's comment on the mainline
devicetree commit:
    "the name of this board deviates from the standard Radxa naming scheme,
     which is something like "ROCK <number><letter>" thus, "rock-5a" is
     fine, but it should be "rock-5-itx", simply because there's a space
     between "5" and "ITX" in "ROCK 5 ITX"

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2024-08-12 15:43:44 +08:00
Tom Rini
f4f845b859 Merge patch series "Universal Payload initial series"
Simon Glass <sjg@chromium.org> says:

Universal Payload (UPL) is an Industry Standard for firmware
components[1]. UPL is designed to improve interoperability within the
firmware industry, allowing mixing and matching of projects with less
friction and fewer project-specific implementations. UPL is
cross-platform, supporting ARM, x86 and RISC-V initially.

This series provides some initial support for this, targeting 0.9.1 and
sandbox only.

Features still to come include:
- Support for architectures
- FIT validation
- Handoff validation
- Interoperability tests
2024-08-09 16:03:21 -06:00
Simon Glass
91fde8e176 sandbox: Add an SPL loader for UPL
Add support for loading a UPL image from SPL. This uses the simple FIT
implementation, but also loads the full FIT just to permit more testing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-09 16:03:20 -06:00
Simon Glass
dadd23ebab sandbox: Add a flag to enable UPL
UPL significantly alters the boot flow for sandbox. Add a flag to enable
this so that it can be enabled only on tests which need it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-09 16:03:20 -06:00
Simon Glass
16b9c64caf sandbox: Set up global_data earlier
It is possible for U-Boot functions such as printf() to be called
within state_init(). This can end up checking gd->flags (e.g. in putc())
before global_data is set up.

Move the setup earlier to avoid this. This fixes the suppression of some
debug output in memory allocation (when enabled).

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-09 16:03:19 -06:00
Simon Glass
b254a8359e sandbox: Return error code from read/write/seek
The existing API for these functions is different from the rest of
U-Boot, in that any error code must be obtained from the errno variable
on failure. This variable is part of the C library, so accessing it
outside of the special 'sandbox' shim-functions is not ideal.

Adjust the API to return an error code, to avoid this. Update existing
uses to check for any negative value, rather than just -1.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-09 16:03:19 -06:00
Simon Glass
d8289e7dfe sandbox: fdt: Avoid overwriting an existing fdt
Since the removal of OF_HOSTFILE logic in board_fdt_blob_setup(), the
logic for obtaining the DT is handled in the OF_BOARD option. If a
devicetree comes from a bloblist it is immediately overwritten by this
function.

Fix this by skipping the function if a devicetree is already present.

This is sort-of a fix for e7fb7896 ("sandbox: Remove OF_HOSTFILE") but
it has only come to light since bloblist was added, so I have not added
a Fixes tag.

Unfortunately it is not possible to report the correct FDT source with
the current code. It might be best to use an error-return code for
board_fdt_blob_setup() so that an error can be reported if the board
does not provide the DT.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-09 16:03:19 -06:00