25838 Commits

Author SHA1 Message Date
Marek Vasut
476b886a6f pinctrl: renesas: Convert to IS_ENABLED() macro
Use the IS_ENABLED() macro to reduce amount of #ifdef use in the driver
and improve code coverage. With IS_ENABLED() macro, the code is compiled
and then optimized out, which prevents bitrot.

In case no PFC table matches the SoC in use, do not probe the driver
and instead exit with -ENODEV. This should never happen under normal
conditions, because this would mean the driver DT compatible string
match happened, but the list in probe() cannot match the model listed
in match data associated with the compatible string on which the match
did happen.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-29 16:55:31 +01:00
Tom Rini
5cfbf8c364 Prepare v2025.01-rc5
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Merge tag 'v2025.01-rc5' into next

Prepare v2025.01-rc5
2024-12-25 22:31:04 -06:00
Marek Vasut
545208247d pinctrl: renesas: Minimize R8A779H0 V4M PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- INTC/INTC-EX
- MSIOF
- PWM
- SSI

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
a69f8cb9e2 pinctrl: renesas: Minimize R8A779G0 V4H PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
35c5ac0d53 pinctrl: renesas: Minimize R8A779F0 S4 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- INTC-EX
- MSIOF

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
15c51cc62d pinctrl: renesas: Minimize R8A779A0 V3U PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
59c9ca0ba3 pinctrl: renesas: Minimize R8A77995 D3 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
1ee288a6aa pinctrl: renesas: Minimize R8A77990 E3 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- INTC/INTC-EX
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
fa51edbab6 pinctrl: renesas: Minimize R8A77980 V3H PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
a046f58f33 pinctrl: renesas: Minimize R8A77970 V3M PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
d020179cf0 pinctrl: renesas: Minimize R8A77965 M3-N PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
0edacf1a41 pinctrl: renesas: Minimize R8A77960 M3-W and R8A77961 M3-W+ PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
2890251ead pinctrl: renesas: Minimize R8A77951 H3 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
7f19150405 pinctrl: renesas: Minimize R8A7794 E2 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN
- DU
- INTC
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
7db1d1fadf pinctrl: renesas: Minimize R8A7792 V2H PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- CAN
- DU
- INTC
- MSIOF
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
6671e9aebd pinctrl: renesas: Minimize R8A7791 M2-W and R8A7793 M2-N PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN
- DU
- INTC
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
2f3bd7ca26 pinctrl: renesas: Minimize R8A7790 H2 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN
- DU
- INTC
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Marek Vasut
e6e3d70632 pinctrl: renesas: Add Kconfig symbol for conditional build of full PFC tables
By default the pin multiplexing tables used by U-Boot are reduced
to keep the size of the bootloader low. This option allows build of
full pin multiplexing tables the same way they are included in the
Linux kernel. This includes pin multiplexing options for Audio, CAN,
CANFD, DU, INTC, INTC-EX, MSIOF, PWM, SSI, for which there is no
U-Boot driver. This option is disabled by default.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-25 19:29:47 +01:00
Heinrich Schuchardt
980bcccf41 crypto: typo volatge
%s/volatge/voltage/g

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2024-12-24 18:07:53 +01:00
Peng Fan
6016960ceb imx: Use per board ddrphy_trained_csr
Drop global ddrphy_trained_csr which maybe different with per board
ddrphy_trained_csr. DDR TOOL generates ddrphy_trained_csr for each
board, using the global ddrphy_trained_csr has risk that values may
be not up to date.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-12-23 08:10:15 -03:00
Meng Li
2f74cac8c3 net: fec_mxc: add DM_FLAG_ACTIVE_DMA flag for FEC network driver
When FEC network card works as the prime one in u-boot, and is in
active status, kernel might crash during booting up stage, especially
working with grub. Because the DMA of FEC is still in active status, and
copy data into memory if there is network data received. In this case, if
kernel allocated a part of memory that has overlay with the memory
used by DMA, kernel memory may be destroyed and cause kernel crashes.
Because before kernel boots up really, u-boot dm_remove_devices_flags()
can call the remove callback of FEC driver with DM_FLAG_ACTIVE_DMA
flag. In fecmxc_remove(), phy power is disabled, so there is no data
received. In this way, it makes sure that there is no DMA action, so
that avoid kernel crashing occurs.

Signed-off-by: Meng Li <Meng.Li@windriver.com>
2024-12-23 08:09:53 -03:00
Tim Harvey
87bdb4e8a7 drivers: misc: gsc: add support for prescaled
Add support for Gateworks System Controller pre-scaled ADC input.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-12-23 08:08:51 -03:00
Tim Harvey
795a7425a7 drivers: misc: gsc: add support for fan controller
Add support for Gateworks System Controller fan tach input.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-12-23 08:08:51 -03:00
Tim Harvey
f331967b3d spi: mxc_spi: use proper clock for SPI bus
The mxc_get_clock function is around for compatibility with older
drivers that are not clock aware. In this case asking for the clk for
MXC_CSPI_CLK does not take into account there are multiple SPI busses on
modern IMX SoC's and it will return the clock for the first bus which
may not be used or configured.

In the case you are not using the first bus you will not get the proper
clock. Fix this by obtaining the clock rate from the bus clock.

This resolves an invalid SPI clock frequency configuration for SPI2 on a
board where SPI1 is not used.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-12-23 08:08:34 -03:00
Marek Vasut
70da4f2859 net: rswitch: Do not register disabled ports as ethernet devices
In case an rswitch port is described as disabled in DT, do not
register it as ethernet device in U-Boot. This way, such ports
cannot be accessed from U-Boot command line.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-22 22:34:32 +01:00
Marek Vasut
fa0f9e83a0 net: rswitch: Add missing cache invalidate of TX descriptor
TFTP transfers of large files, for example 128 MiB, can sporadically
get stuck and the transfer slows down considerably.

This happens because the TX DMA descriptor in DRAM becomes out of sync
with the view of the TX DMA descriptor content from the CPU side, which
is viewed through the CPU caches. In order to guarantee these two views
are consistent, the cache over TX DMA descriptor that has possibly been
written by the rswitch hardware must first be invalidated, only then can
the descriptor be cleared and updated by the CPU, and finally the cache
over that area must be flushed back into DRAM to make sure the rswitch
hardware has consistent view of the updated descriptor content.

The very first invalidation operation was missing, which led to sporadic
corruption of the TX DMA descriptor. Fix it, add the missing invalidation
operation.

Reported-by: Enric Balletbo i Serra <eballetb@redhat.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Enric Balletbo i Serra <eballetb@redhat.com>
2024-12-20 22:20:37 +01:00
Geert Uytterhoeven
08806a6e52 clk: renesas: r8a779h0: Drop CLK_PLL2_DIV2 to clarify ZCn clocks
Early revisions of the R-Car V4M Series Hardware User’s Manual
contained an incorrect formula for the CPU core clocks:

    ZCnφ = (PLL2VCO x 1/2) x mult/32

Dang-san fixed this by using CLK_PLL2_DIV2 instead of CLK_PLL2 as the
parent clock.

In Rev.0.70 of the documentation, the formula was corrected to:

    ZCnφ = (PLL2VCO x 1/4) x mult/32

As the CPG Block Diagram now shows a separate 1/4 post-divider for PLL2,
the use of CLK_PLL2_DIV2 is a recurring source of confusion.  Hence get
rid of CLK_PLL2_DIV2, and include the proper 1/4 post-divider in the
invocation of the DEF_GEN4_Z() macro, like is done on other R-Car Gen4
(and Gen3) SoCs.

Ported from Linux commit
92850bed9d4d ("clk: renesas: r8a779h0: Drop CLK_PLL2_DIV2 to clarify ZCn clocks")

Reported-by: Vinh Nguyen <vinh.nguyen.xz@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/0d2789cac2bf306145fe0bbf269c2da5942bb68f.1728377724.git.geert+renesas@glider.be
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-20 22:20:37 +01:00
Roger Quadros
6f99dc241d phy: don't spam console if phys property is absent in device node
In generic_phy_get_bulk(), if 'phys' property is absent in
the device node then it is not an error condition.

Change print message verbosity to debug to avoid spamming
console in such cases.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2024-12-18 18:58:59 -06:00
Tom Rini
b066ac51e0 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/23926

- Board: Support LicheeRV Nano
- Board: Support bananapi-f3
- Board: Switch to OF_UPSTREAM for StarFive JH7110
- Board: Add sdhci driver for TH1520 SoC
2024-12-18 08:01:48 -06:00
Maksim Kiselev
1cf3e900af mmc: snps_sdhci: Add sdhci driver support for TH1520 SoC
Add support for DesignWare SDHCI host controller on Alibaba TH1520 SoC

Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-12-18 13:19:16 +08:00
Hal Feng
0b7bf26d06 pcie: starfive: Make the driver compatible with upstream DT
There are difference between upstream DT and the old DT
in terms of reg base, reset gpio and syscon. Make the driver
compatible with upstream DT.

Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: E Shattow <lucent@gmail.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2024-12-18 13:19:15 +08:00
Hal Feng
b364642f61 mmc: dw_mmc: Add "starfive, jh7110-mmc" compatible to match upstream DT
Make the U-Boot JH7110 MMC driver compatible with upstream DT.

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2024-12-18 13:19:15 +08:00
Hal Feng
84d3911a01 dts: starfive: Switch to using upstream DT
Enable OF_UPSTREAM to use upstream DT and add starfive/ prefix to
the DEFAULT_DEVICE_TREE. Rename jh7110-starfive-visionfive-2-u-boot.dtsi
to jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi and set the v1.3b
device tree as the default device tree.

Drop redundant DT files from arch/riscv/dts/ and redundant clock and
reset definitions from include/dt-bindings/.

Since the old clock definitions is a little different from those in
upstream Linux, update the clock definitions in clock drivers
accordingly.

Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: E Shattow <lucent@gmail.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2024-12-18 13:19:15 +08:00
Tom Rini
4561977c10 Merge branch 'u-boot-nand-20241212' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next
CI: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/23837

Small addition to uboot-nand. Nothing relevant for now. Anyway
a nice new command coming from Miquel Raynal and small changes.
2024-12-17 13:17:41 -06:00
Michael Trimarchi
1fac577207 nand: Add a watch command
This is a debug command to monitor the retention state of the data on
the array. The command needs a duplication of the mtd_read_oob()
function to actually return the maximum number of bitflips encountered
while reading the page. We could write a specific implementation for the
Sunxi driver but this is probably enough.

    nand watch <off> <size> - check an area for bitflips
    nand watch.part <part> - check a partition for bitflips
    nand watch.chip - check the whole device for bitflips

The output may be a bit verbose and could look like:

    => nand watch.chip
    device 0 whole chip
    size adjusted to 0xff60000 (5 bad blocks)

    NAND watch for bitflips in area 0x0-0xff60000:
    Page       0 (0x00000000) -> error -74
    Page       1 (0x00000800) -> error -74
    Page       2 (0x00001000) -> error -74
    Page       3 (0x00001800) -> error -74
    Page       4 (0x00002000) -> error -74
    Page       5 (0x00002800) -> error -74
    Page       6 (0x00003000) -> error -74
    Page       7 (0x00003800) -> error -74
    Page       8 (0x00004000) -> error -74
    Page       9 (0x00004800) -> error -74
    Page      10 (0x00005000) -> error -74
    Page      11 (0x00005800) -> error -74
    Page      12 (0x00006000) -> error -74
    Page      13 (0x00006800) -> error -74
    Page      14 (0x00007000) -> error -74
    Page      15 (0x00007800) -> error -74
    Page      16 (0x00008000) -> error -74
    Page      17 (0x00008800) -> error -74
    Page      18 (0x00009000) -> error -74
    Page      19 (0x00009800) -> error -74
    Page      20 (0x0000a000) -> error -74
    Page      21 (0x0000a800) -> error -74
    Page      22 (0x0000b000) -> error -74
    Page      23 (0x0000b800) -> error -74
    Page    1110 (0x0022b000) -> up to  1 bf/chunk
    Page    1122 (0x00231000) -> up to  1 bf/chunk
    Page    1132 (0x00236000) -> up to  1 bf/chunk
    Page    1362 (0x002a9000) -> up to  1 bf/chunk
    Page    4990 (0x009bf000) -> up to  1 bf/chunk
    Page    5728 (0x00b30000) -> up to  1 bf/chunk
    Page    7116 (0x00de6000) -> up to  1 bf/chunk
    Page    7160 (0x00dfc000) -> up to  1 bf/chunk
    Page    7494 (0x00ea3000) -> up to  1 bf/chunk
    Page   10842 (0x0152d000) -> up to  1 bf/chunk
    Page   11614 (0x016af000) -> up to  1 bf/chunk
    Page   11970 (0x01761000) -> up to  1 bf/chunk
    Page   12536 (0x0187c000) -> up to  1 bf/chunk
    Page   12687 (0x018c7800) -> up to  1 bf/chunk
    Page   14298 (0x01bed000) -> up to  1 bf/chunk
    Page   18268 (0x023ae000) -> up to  1 bf/chunk
    Page   18760 (0x024a4000) -> up to  1 bf/chunk
    Page   21440 (0x029e0000) -> up to  1 bf/chunk
    Page   22336 (0x02ba0000) -> up to  1 bf/chunk
    Page   22592 (0x02c20000) -> up to  1 bf/chunk
    Page   23872 (0x02ea0000) -> up to  1 bf/chunk
    Page   27584 (0x035e0000) -> up to  1 bf/chunk
    Page   35008 (0x04460000) -> up to  1 bf/chunk
    Page   37184 (0x048a0000) -> up to  1 bf/chunk
    Page   41728 (0x05180000) -> up to  1 bf/chunk
    Page   42176 (0x05260000) -> up to  1 bf/chunk
    Page   43200 (0x05460000) -> up to  1 bf/chunk
    Page   43328 (0x054a0000) -> up to  1 bf/chunk
    Page   45376 (0x058a0000) -> up to  1 bf/chunk
    Page   47040 (0x05be0000) -> up to  1 bf/chunk
    Page   47552 (0x05ce0000) -> up to  1 bf/chunk
    Page   49344 (0x06060000) -> up to  1 bf/chunk
    Page   49856 (0x06160000) -> up to  1 bf/chunk
    Page   62784 (0x07aa0000) -> up to  1 bf/chunk
    Page   65153 (0x07f40800) -> up to  1 bf/chunk
    Page   65228 (0x07f66000) -> up to  1 bf/chunk
    Page   65382 (0x07fb3000) -> up to  1 bf/chunk
    Page   98624 (0x0c0a0000) -> up to  1 bf/chunk
    Page  101952 (0x0c720000) -> up to  1 bf/chunk
    Page  107584 (0x0d220000) -> up to  1 bf/chunk
    Page  118208 (0x0e6e0000) -> up to  1 bf/chunk
    Page  126656 (0x0f760000) -> up to  1 bf/chunk
    Page  127680 (0x0f960000) -> up to  1 bf/chunk
    Page  129920 (0x0fdc0000) -> up to  1 bf/chunk
    Maximum number of bitflips: 1
    Pages with bitflips: 44/130752

It is also possible to reduce the output with the .quiet suffix in order
to just show the summary.

    => nand watch.chip
    device 0 whole chip
    size adjusted to 0xff60000 (5 bad blocks)

    NAND watch for bitflips in area 0x0-0xff60000:
    Maximum number of bitflips: 1
    Pages with bitflips: 44/130752

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2024-12-17 13:17:41 -06:00
Marcus Folkesson
bb736358e5 mtd: nand: raw: atmel: remove unnecessary return value
The condition 'ret' is always true as it is never set to other than
-EIO.

Remove 'ret' and the condition for copy.

Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Reviewed-by: Michael Trimarchi <micheal@amarulasolutions.com>
2024-12-17 13:17:41 -06:00
Tom Rini
a4ee6396fe Merge tag 'u-boot-imx-next-20241217' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/23877

- Add support for Apalis iMX8 1300MHz version.
- Don't advertise Gbit on (R)MII on the FEC controller.
- Fix srktool -c usage by removing spaces.
2024-12-17 13:16:22 -06:00
Svyatoslav Ryhel
b46bd4f874 driver: clk: tegra: init basic clocks on probe
In case DM drivers probe earlier than board clock setup is done
init of basic clocks should be done in CAR driver probe as well.
Add it to avoid possible clock related problems.

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-12-16 17:07:39 -06:00
Svyatoslav Ryhel
1db256a347 driver: clk: tegra: partially support PLL clocks
Return PLL id into struct clk if PLL is parsed from device
tree instead of throwing an error. Allow requesting PLL
clock rate via get_rate op.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-12-16 17:07:39 -06:00
Ronald Wahl
822afeb7bf mmc: Fix potential timer value truncation
On 64bit systems the timer value might be truncated to a 32bit value
causing malfunctions. For example on ARM the timer might start from 0
again only after a cold reset. The 32bit overflow occurs after a bit
more than 49 days (1000 Hz counter) so booting after that time may lead
to a surprise because the board might become stuck requiring a cold
reset.

Signed-off-by: Ronald Wahl <ronald.wahl@legrand.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2024-12-16 11:24:42 +09:00
Yuri Zaporozhets
ae12873de7 bios_emulator: fix incorrect printing of address in "jump near immediate"
In the x86emuOp_jump_call_near_IMM() function the target address is
printed incorrectly when jumping backwards. For example instead of
"jmp 0xe8bc" the string "jmp ffffe8bc" is printed. That's because
of the following macro:

    DECODE_PRINTF2("%04x\n", ip);

while it should be

    DECODE_PRINTF2("%04x\n", (u16)ip);

Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
2024-12-15 11:39:23 -06:00
Yuri Zaporozhets
5fb5180a16 bios_emulator: fix incorrect printing of address in "call near immediate"
In the x86emuOp_call_near_IMM() function the address of CALL is
printed incorrectly when jumping backwards. For example, the correct
disassemble of the bytes below would be:

0000E8DE  E8DBFF            call 0xe8bc

(verified by ndisasm). But instead the address is printed as "ffffe8bc".
That's because of the following macro:

    DECODE_PRINTF2("%04x\n", ip);

while it should be

    DECODE_PRINTF2("%04x\n", (u16)ip);

Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
2024-12-15 11:39:21 -06:00
Yuri Zaporozhets
82a59b45d3 bios_emulator: fix garbled printing of disassembled SET* instructions
When DEBUG_DECODE_F is enabled in bios_emulator, the printing of
SET{O,NO,B,NB,Z,NZ,BE,NBE,S,NS,P,TP,L,NL,LE,NLE} instructions
is not followed by newline and is, therefore, immediately followed
by the printed address of a new instruction. This garbles the output
and makes it very difficult to read.

This patch adds missing DECODE_PRINTF("\n") calls to print newlines.

Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
2024-12-15 11:39:18 -06:00
Yuri Zaporozhets
15c1b2f974 bios_emulator: fix garbled printing of disassembled BSF instruction
When DEBUG_DECODE_F is enabled in bios_emulator, the printing of BSF
instructions is garbled because the '\n' symbol is used instead of
the correct '\t'. Fix that.

Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
2024-12-15 11:39:16 -06:00
Alexander Sverdlin
bb28f0e40f net: fec: phy: Don't advertise Gbit on (R)MII
Currently if a gigabit-capable PHY is connected to FEC via RMII or MII, it
will advertise 1000FULL and 1000HALF to a link partner.

Different problems may arise here:
- usually with (R)MII between MAC and PHY the PHY's connection to magnetics
would have only 2 pairs routed as well, otherwise a PHY can negotiate 1000
speed and there will be no traffic possible;
- but even if there is no way to negotiate 1000 speed in HW (only 2 signal
pairs routed), it may take a lot of time for PHY to figure this out; in
case of AD1300 it takes 17-20 seconds, which is waay longer than default
4s PHY_ANEG_TIMEOUT.

Use phy_set_supported() in such cases to disable gigabit advertised
options.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
2024-12-15 12:34:41 -03:00
J. Neuschäfer
69ec7f35e0 clk: mpc83xx: Fix typo in "Coherent System Bus"
Cosmetic change.

Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2024-12-15 02:03:52 +01:00
Tom Rini
8aab7730c1 Merge patch series "Hyperflash Boot fixes for J7200/J721E"
Anurag Dutta <a-dutta@ti.com> says:

Hi All,
In u-boot, hbmc is broken and has been removed from j7200
configs. This series re-enables the hbmc driver and introduces a series
of hyperflash boot fixes. At present, in u-boot, the parent device (fss)
gets registered as a syscon device. This is done because the MMIO
mux driver in u-boot did not support the mux functionality when the
parent device is not a syscon. In this series, we make relevant changes
in the hbmc driver as well as dts' so that we can use the reg-mux driver for
selecting the appropriate state of the mux.

Test logs:

1) j721e-idk-gw hyperflash boot test: https://gist.github.com/anuragdutta731/50aae6fec707a3ffad6d985de6757fe4
2) j7200-evm hyperflash boot test: https://gist.github.com/anuragdutta731/c3a4d60f8bfd9c425d6c44b36eb7322b

Link: https://lore.kernel.org/r/20241129113136.383277-1-a-dutta@ti.com
2024-12-14 09:34:27 -06:00
Anurag Dutta
8f71d37838 mtd: Kconfig: Change HBMC driver's dependency to MULTIPLEXER and MUX_MMIO
The HBMC_AM654 driver was dependent on SYSCON because syscon APIs were
being used to select the multiplexer state. Change the dependency to
MULTIPLEXER and MUX_MMIO because mux APIs are now being used to
select mux state.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
2024-12-14 09:34:16 -06:00
Anurag Dutta
a42b8b0b3f mtd: HBMC-AM654: Changed syscon API to mux APIs
The syscon APIs were used for selecting the state of the mux
device because the mmio-mux driver in u-boot did not support
the mux functionality when the parent device is not a syscon.
Change to mux APIs which utilizes the reg-mux driver to select the
state of the multiplexer.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
2024-12-14 09:34:16 -06:00
Anurag Dutta
f0558f3a89 mux: Makefile: Add config for mux drivers
Add config required to build mmio-mux driver and dependencies.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
2024-12-14 09:34:16 -06:00