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3 Commits

Author SHA1 Message Date
Wenyou Yang
fed0509c92 clk: at91: add PLLADIV driver 
As said in the SAMA5D2 datasheet, the PLLA clock must be divided
by 2 by writing the PLLADIV2 bit in PMC_MCKR, if the ratio between
PCK and MCK is 3 (MDIV = 3). This is the purpose of the driver.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
 2018-03-16 07:30:04 -04:00
Wenyou Yang
cb0cb1b0cf clk: at91: add USB Host clock driver 
Add USB clock driver to configure the input clock and the divider
in the PMC_USB register to generate a 48MHz and a 12MHz signal to
the USB Host OHCI.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
 2018-03-16 07:30:04 -04:00
Wenyou Yang
9e5935c04e clk: at91: Add clock driver 
The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
 2016-08-15 22:12:00 +02:00