Imply OF_LIBFDT_OVERLAY Kconfig options to add device tree overlay
support on all RK3399 boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Imply support for GbE PHY status parsing and configuration when support
for onboard ethernet is enabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
The RK3399 SoC contain a crypto engine block that can generate random
numbers.
Imply DM_RNG and RNG_ROCKCHIP Kconfig options to take advantage of the
random generator on all RK3399 boards. Also remove the unnecessary use
of a status = "okay" prop.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
The RK3399 SoC support the ARMv8 Cryptography Extensions, use of ARMv8
crypto can speed up FIT checksum validation in SPL.
Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto
extensions for SHA256 when validating checksum of FIT images.
Imply SPL_FIT_SIGNATURE and LEGACY_IMAGE_FORMAT to enable FIT checksum
validation to almost all RK3399 boards.
The following boards have been excluded:
- chromebook_bob: SPL max size limitation of 120 KiB
- chromebook_kevin: SPL max size limitation of 120 KiB
Also imply OF_LIVE to help speed up init of U-Boot proper and disable
CONFIG_SPL_RAW_IMAGE_SUPPORT on leez-rk3399 to ensure SPL does not try
to jump to code that failed checksum validation.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3399-ficus board is only using SPL and not TPL+SPL like all other
RK3399 boards, chromebook bob/kevin excluded. It does not seem to be any
technical reason why this board was left using only SPL.
Switch to use TPL+SPL and to use the common bss and stack addresses
introduced in commit 008ba0d56d00 ("rockchip: Add common default bss and
stack addresses"). Also add the missing DEFAULT_FDT_FILE option.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3399-puma board is currently using SPL stack and bss addr in SRAM,
the same addr typically used by TPL, this differs from most other RK3399
boards.
Switch to use the common bss and stack addresses introduced in commit
008ba0d56d00 ("rockchip: Add common default bss and stack addresses").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On rk3399-puma the FIT payload is located at sector 0x200 compared
to the more Rockchip common sector 0x4000 offset:
SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
Because FIT payload is located at sector 0x200 and IDBlock is located at
sector 64, the combined size of TPL+SPL (idbloader.img) cannot take up
more than 224 KiB:
(0x200 - 64) x 512 = 0x38000 (224 KiB)
Adjust SPL_PAD_TO to match the used 0x200 sector offset.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chromebook bob and kevin typically run coreboot as the initial boot
loader, however, U-Boot proper can be used as a secondary boot loader.
It is also possible to run U-Boot SPL and proper bare metal, with SPL
and the U-Boot payload loaded from SPI flash.
Because of this chromebook bob and kevin only use SPL and not TPL+SPL
like other RK3399 boards, this mean that SPL is loaded to and run from
SRAM instead of DRAM.
The U-Boot payload is located at 0x40000 (256 KiB) offset in SPI flash
and because the BROM only read first 2 KiB for each 4 KiB page, the size
of SPL (idbloader.img) is limited to max 128 KiB.
The chosen bss start address further limits the size of SPL to 120 KiB.
0xff8e0000 (SPL_BSS_START_ADDR) - 0xff8c2000 (SPL_TEXT_BASE) = 0x1e000
Update SPL_MAX_SIZE to reflect the 120 KiB max size limitation.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/20614
- Add SPL variant of DM_RNG so that the DM_RNG can be disabled in SPL if
necessary. This may be necessary due to e.g. size constraints of the SPL.
- dd SPL variant of SPL_FSL_CAAM_RNG so that the SPL_FSL_CAAM_RNG can be
disabled in SPL if necessary. This may be necessary due to e.g. size
constraints of the SPL.
- Differentiate between CAAM and DCP in Kconfig entry.
Differentiate between "Enable Random Number Generator support" and
"Enable Random Number Generator support" in Kconfig entry, mark the
first as CAAM and the second as DCP, otherwise users cannot easily
decide which of the options is which and enable the correct one.
Signed-off-by: Marek Vasut <marex@denx.de>
Add SPL variant of SPL_FSL_CAAM_RNG so that the SPL_FSL_CAAM_RNG can
be disabled in SPL if necessary. This may be necessary due to e.g.
size constraints of the SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Add SPL variant of DM_RNG so that the DM_RNG can be disabled in SPL
if necessary. This may be necessary due to e.g. size constraints of
the SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Joel is no longer with Broadcom. Remove his email from bcmbca maintainer
list and replace him with myself for stack protection maintainer.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
On AM62x SK we can see a boot failure with signature "alloc space
exhausted", so fix by increasing size of SPL_STACK_R_MALLOC_SIMPLE_LEN.
Fixes: 128f81290b ("arm: dts: k3: binman: am625: add support for signing TIFSSTUB Images")
Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
For 4GB dram size, the dram is divided into 2 banks and
the address space of these 2 banks are not concatenated.
Limit the gd->ram_top to not exceed bank0 top to prevent
accessing invalid memory region.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
When u-boot enable CONFIG_SYS_BOOT_RAMDISK_HIGH, rootfs image relocated
from FIU address space to memory address before jump to kernel.
Since Arbel reserved memory from 0x00000000 to 0x06200000 for tip image,
and rootfs image may too large that cannot found a suitable location
before 128MB(0x8000000), so increase mapping size from 128MB to 192MB.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
When parsing option 40 (network information service domain) the
option length is in variable 'oplen' and not in 'size'.
Addresses-Coverity-ID: 492765 Uninitialized variables (UNINIT)
Fixes: 8ab388bfdbcf ("net: add support to parse the NIS domain for the dhcp options")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Change in v2:
- Fix applies to all block devices, not just MMC.
If partition init is not completed within the gpt write,
the gpt partition list will not be updated.
Signed-off-by: Kishan Dudhatra <kishan.dudhatra@siliconsignals.io>
Commit 37cb626da25d0d ("mmc: sdhci: Add Support for ADMA2") introduced
ADMA_DESC_LEN == 16 (64 bit case), but it was never used before commit
74755c1fed1b0 ("mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops").
"sizeof(struct sdhci_adma_desc)" (== 12 for 64bit case) was used instead.
Confusion probably originates from Linux commit 685e444bbaa0
("mmc: sdhci: Add ADMA2 64-bit addressing support for V4 mode"), but
the latter "V4 mode" was never ported to U-Boot.
Fixes: 74755c1fed1b0 ("mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops")
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com>
Tested-by: Judith Mendez <jm@ti.com>
Documentation:
* correct description of 'env print -e'
UEFI:
* remove superfluous efi_restore_gd after EFI_CALL
* terminate efidebug test bootmgr early on error
* do not install device-tree if bootmgr fails
* pass GUID by address to efi_dp_from_lo
* remove dead code in efi_var_mem_init()
* enable QueryVariableInfo at runtime for file backed variables
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Merge tag 'efi-2024-07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2024-07-rc2
Documentation:
* correct description of 'env print -e'
UEFI:
* remove superfluous efi_restore_gd after EFI_CALL
* terminate efidebug test bootmgr early on error
* do not install device-tree if bootmgr fails
* pass GUID by address to efi_dp_from_lo
* remove dead code in efi_var_mem_init()
* enable QueryVariableInfo at runtime for file backed variables
Rename spl_soc_init() to spl_dram_init() because the generic function
name does not reflect what the function actually does. Also
spl_dram_init() is commonly used for dram initialization and should be
called from board_init_f().
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rename spl_soc_init() to spl_dram_init() because the generic function
name does not reflect what the function actually does. Also
spl_dram_init() is commonly used for dram initialization and should be
called from board_init_f().
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add configs related to spi nor flash for Sophgo Milk-V Duo board
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add spi nor flash controller node for cv18xx SoCs
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add spi nor flash controller driver for cv1800b SoC
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add configs related to ethernet and ethernet boot command for Sophgo Milk-V
Duo board
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Initialize register in cv1800b ethernet phy to make it compatible with
generic phy driver
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Let the sbi command detect the coreboot and oreboot SBI Implementation IDs
defined in SBI specification v2.0.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
OpenSBI has implemented the Supervisor Software Events Extension.
Allow detecting it in the sbi command.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add sysreset configs as well as poweroff and reset commands for Sophgo
Milk-V Duo board.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Bind cv1800b sysreset driver for Sophgo Milk-V Duo board in board_init
function.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Currently, only the receive delay is configured while the transmit delay
is not set, which may result in errors when writing to the file. This issue
can be resolved by setting PHY_TX_SRC_INVERT to SDHCI_PHY_TX_RX_DLY.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The instruction and data cache line sizes of Andes core
are 64-byte. Select SYS_CACHE_SHIFT_6 for RISCV_NDS so
the SYS_CACHELINE_SIZE is enabled with a default value.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
We should not pass GUIDs by value as this requires copying.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Use Sphinx style for return value.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Previous patches added QueryVariableInfo at runtime tests and
split a common function that can be used at boottime. Weire it
up and run a similar set of tets. While at it move a test which is
checiking for 0 available storage in the common code
Add tests for
- Test QueryVariableInfo returns EFI_SUCCESS
- Test null pointers for the function arguments
- Test invalid combination of attributes
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Since we support QueryVariableInfo at runtime now add the relevant
tests. Since we want those to be reusable at bootime, add them
in a separate file
Add tests for
- Test QueryVariableInfo returns EFI_SUCCESS
- Test null pointers for the function arguments
- Test invalid combination of attributes
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Since commit c28d32f946f0 ("efi_loader: conditionally enable SetvariableRT")
we are enabling the last bits of missing runtime services.
Add support for QueryVariableInfo which we already support at boottime
and we just need to mark some fucntions available at runtime and move
some checks around.
It's worth noting that pointer checks for maxmimum and remaining
variable storage aren't when we store variables on the RPMB, since the
Secure World backend is already performing them.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The check of the return code is already done a few lines above.
Although it doesn't cause any functional issues, remove the superfluous
checks
Addresses-Coverity-ID: 492766 Control flow issues (DEADCODE)
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>