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509 Commits

Author SHA1 Message Date
Jon Loeliger
ae53c8a705 Merge branch 'mpc86xx' 2006-05-31 14:02:09 -05:00
Jon Loeliger
c934f655f9 Review cleanups. 
Signed-off-by: Jon Loeliger <jdl@freescale.com>
 2006-05-31 14:01:32 -05:00
Jon Loeliger
c926a82d82 Merge branch 'mpc86xx' 2006-05-31 13:19:45 -05:00
Jon Loeliger
cb5965fb95 White space cleanup. 
Some 80-column cleanups.
Convert printf() to puts() where possible.
Use #include "spd_sdram.h" as needed.
Enhanced reset command usage message a bit.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
 2006-05-31 12:44:44 -05:00
Jon Loeliger
4d3d729c16 Moved mpc8641hpcn_board_reset() out of cpu/ into board/. 
Signed-off-by: Jon Loeliger <jdl@freescale.com>
 2006-05-31 11:24:28 -05:00
Jon Loeliger
b2a941de06 Remove dead debug code. 
Signed-off-by: Jon Loeliger <jdl@jdl.com>
 2006-05-31 10:07:28 -05:00
Jon Loeliger
126aa70f10 Move mpc86xx PIXIS code to board directory 
First cut at moving the PIXIS platform code out of
the 86xx cpu directory and into board/mpc8641hpcn
where it belongs.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
 2006-05-31 09:49:33 -05:00
Jon Loeliger
eaa1fa16c4 Merge branch 'mpc86xx' 2006-05-30 09:39:33 -05:00
Haiying Wang
38cee12dcf Improve "reset" command's interaction with watchdog. 
"reset altbank" will reset another bank WITHOUT watch dog timer enabled
    "reset altbank wd" will reset another bank WITH watch dog enabled
    "diswd" will disable watch dog after u-boot boots up successfully

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
 2006-05-30 09:10:32 -05:00
Haiying Wang
70205e5a6d Fix two SDRAM setup bugs. 
Fix ECC setup bug.
    Enable 1T/2T based on number of DIMMs present.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
 2006-05-30 08:51:19 -05:00
Jon Loeliger
76bfacfd7c Merge branch 'mpc86xx' 2006-05-19 13:54:58 -05:00
Jon Loeliger
14e37081ff Change arbitration to round-robin for SMP linux. 2006-05-19 13:54:02 -05:00
Jon Loeliger
9a655876e5 Enable dual DDR controllers and interleaving. 2006-05-19 13:54:02 -05:00
Jon Loeliger
cccce5d058 Remove L2 Cache invalidate polling. 2006-05-19 13:54:02 -05:00
Jon Loeliger
846c2d4a0e Merge branch 'mpc86xx' 2006-05-10 09:43:21 -05:00
Haiying Wang
6cfea33477 Remove unneeded INIT_RAM_LOCK cache twiddling. 
Correctly tracks r29 as global data pointer now.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
 2006-05-10 09:38:06 -05:00
Jon Loeliger
a67255363a Merge branch 'mpc86xx' 2006-05-09 08:33:11 -05:00
Wolfgang Denk
4af099bda9 Fix watchdog issues for ColdFire boards. 2006-05-09 13:49:12 +02:00
Wolfgang Denk
1cfefe8cb6 Merge with /home/m8/git/u-boot 2006-05-09 13:46:55 +02:00
Marian Balakowicz
6f5155a95c Make R5200 specific low level initialization board conditional. 2006-05-09 11:51:51 +02:00
Marian Balakowicz
b75ef85f42 Update CPU target identification strings for Coldfire family. 2006-05-09 11:45:31 +02:00
Marian Balakowicz
0c056f0e27 Fix serial console support for MCF5271. 2006-05-09 11:37:13 +02:00
Marian Balakowicz
7a635e004e Add support for Freescale M5271: Merge with /work/u-boot.mcf5271 2006-04-27 19:12:19 +02:00
Jon Loeliger
5c9efb36a6 Cleanup whitespaces and style issues. 
Removed //-style comments.
Use 80-column lines.
Remove trailing whitespace.
Remove dead code and debug cruft.
 2006-04-27 10:15:16 -05:00
Jon Loeliger
debb7354d1 Initial support for MPC8641 HPCN board. 2006-04-26 17:58:56 -05:00
Kumar Gala
8fe9bf61ef Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port: 
- Removed MPC8349ADS port
  - Added PCI support to MPC8349ADS
  - reworked memory map to allow mapping of all regions with BATs
  Patch by Kumar Gala 20 Apr 2006

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
 2006-04-20 13:45:32 -05:00
Wolfgang Denk
8419c01304 MPC5200: enable snooping of DMA transactions on XLB even if no PCI 
is configured; othrwise DMA accesses aren't cache coherent which
causes for example USB to fail.
 2006-04-18 11:05:03 +02:00
Wolfgang Denk
cf48eb9abd Some code cleanup 2006-04-16 10:51:58 +02:00
Wolfgang Denk
9bc97a3d91 Fix Lite500B support: Merge with /home/raj/git/u-boot.l5200b_pci 2006-04-06 10:42:23 +02:00
Wolfgang Denk
197b049b8b Merge with /home/sr/git/u-boot/4xx-sdram 2006-04-05 23:55:15 +02:00
Wolfgang Denk
db28ddb4da Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S 
Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473]
 2006-04-03 15:46:10 +02:00
Wolfgang Denk
d87080b721 GCC-4.x fixes: clean up global data pointer initialization for all boards. 2006-03-31 18:32:53 +02:00
Stefan Roese
62534beb2f Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) 
405 SDRAM: - The SDRAM parameters can now be defined in the board
             config file and the 405 SDRAM controller values will
             be calculated upon bootup (see PPChameleonEVB).
             When those settings are not defined in the board
             config file, the register setup will be as it is now,
             so this implementation should not break any current
             design using this code.

             Thanks to Andrea Marson from DAVE for this patch.

440 DDR:   - Added function sdram_tr1_set to auto calculate the
             TR1 value for the DDR.
           - Added ECC support (see p3p440).

Patch by Stefan Roese, 17 Mar 2006
 2006-03-31 14:32:07 +02:00
Rafal Jaworowski
b66a938342 Set SDelay register in the DDR controller for the MPC5200B chip. 2006-03-29 13:17:09 +02:00
Markus Klotzbuecher
2770bcb21c Merge with http://www.denx.de/git/u-boot.git 2006-03-24 15:43:16 +01:00
Markus Klotzbuecher
40b0bafbb2 Added config options CFG_MONAHANS_RUN_MODE_OSC_RATIO and 
CFG_MONAHANS_TURBO_RUN_MODE_RATIO for configuring the Monahans core
frequency.
 2006-03-24 14:35:25 +01:00
Markus Klotzbuecher
ba70d6a417 delta board: DA9030 initialization and i2c support. Some minor changes to 
make the pxa i2c driver work with the monahans cpu.
 2006-03-24 12:23:27 +01:00
Wolfgang Denk
7b4fd36b03 Add support for MPC859/866 Rev. A.0 2006-03-18 23:31:12 +01:00
Rafal Jaworowski
dc9e499c62 Support for DDR with 32-data path. Addotional notes on injecting 
multiple-bit errors.
 2006-03-16 17:46:46 +01:00
Marian Balakowicz
4c8d1ecce2 Add support for ECC DDR initialization on MPC83xx. 2006-03-14 16:23:35 +01:00
Marian Balakowicz
61f25155ac Add DMA support for MPC83xx. 2006-03-14 16:14:48 +01:00
Marian Balakowicz
6d8ae5abb5 Add sync in do_reset() routine for MPC83xx after RPR register 
was written to. It is need on some targets when BAT translation
is enabled.
 2006-03-14 16:12:48 +01:00
Marian Balakowicz
cd94ba397e Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx. 2006-03-14 16:02:31 +01:00
Marian Balakowicz
a7c66ad2e5 Correct shift offsets in icache_status and dcache_status for MPC83xx. 2006-03-14 16:01:25 +01:00
Wolfgang Denk
ff7fefe679 Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific timer and 
cpu_reset code from cpu/$(CPU) into the new cpu/$(CPU)/$(SOC) directories
Patch by Andreas Engel, 13 Mar 2006
 2006-03-13 12:37:35 +01:00
Stefan Roese
f3fecfe6d7 Fix problem with updated PCI code in cpu/ppc4xx/405gp_pci.c 
Patch by Stefan Roese, 13 Mar 2006
 2006-03-13 09:43:01 +01:00
Stefan Roese
9a7b408c11 cpu/ppc4xx/start.S : exceptions are enabled after relocation 
Patch by Cedric Vincent, 6 June 2005
 2006-03-13 09:42:28 +01:00
Wolfgang Denk
9551530615 au1x00_eth.c: check malloc return value and abort if it failed 
Patch by Andrew Dyer, 26 Jul 2005
 2006-03-13 01:00:22 +01:00
Wolfgang Denk
b38dbd4622 Fix bug in [id]cache_status commands for MPC85xx processors; 
should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
 2006-03-13 00:46:05 +01:00
Wolfgang Denk
795bee8496 Merge with git://git.kernel.org/pub/scm/boot/u-boot/u-boot.git#mpc83xx 2006-03-12 21:33:52 +01:00