96315 Commits

Author SHA1 Message Date
Tom Rini
3251da3864 Merge patch series "Add driver for Motorcomm YT8821 2.5G ethernet phy"
Frank Sae <Frank.Sae@motor-comm.com> says:

YT8531 as Gigabit transceiver uses bit15:14(bit9 reserved default 0) as phy
speed mask, YT8821 as 2.5 Gigabit transceiver uses bit9 bit15:14 as phy
speed mask.

Be compatible to YT8821, reform phy speed mask and phy speed macro.

Based on update above, add YT8821 2.5G phy driver.

Link: https://lore.kernel.org/r/20240912120225.28884-1-Frank.Sae@motor-comm.com
2024-10-27 17:03:40 -06:00
Jerome Forissier
63150710e3 net: recv(): return -EAGAIN instead of 0 when no cleanup is expected
Some drivers do not behave properly when free_pkt() is called with a
length of zero. It is an issue I observed when developing the lwIP
series [1] (see "QEMU CI tests for r2dplus_i82557c, r2dplus_rtl8139"
in the change log) and which I fixed incorrectly by not calling
free_pkt() when recv() returns 0. That turned out to be wrong for two
reasons:

1. The DM documentation [2] clearly requires it:

  "The **recv** function polls for availability of a new packet. [...]
   If there is an error [...], return 0 if you require the packet to
   be cleaned up normally, or a negative error code otherwise (cleanup
   not necessary or already done).

   If **free_pkt** is defined, U-Boot will call it after a received
   packet has been processed [...]. free_pkt() will be called after
   recv(), for the same packet [...]"

2. The imx8mp_evk platform will fail with OOM errors if free_pkt() is
   not called after recv() returns 0:

   u-boot=> tftp 192.168.0.16:50M
   Using ethernet@30be0000 device
   TFTP from server 192.168.0.16; our IP address is 192.168.0.48
   Filename '50M'.
   Load address: 0x40480000
   Loading: #######################fecmxc_recv: error allocating packetp
   fecmxc_recv: error allocating packetp
   fecmxc_recv: error allocating packetp
   ...

Therefore, make recv() return -EAGAIN instead of 0 when no packet is
available and the driver doesn't expect free_pkt() to be called
subsequently.

[1] https://lists.denx.de/pipermail/u-boot/2024-August/562861.html
[2] doc/develop/driver-model/ethernet.rst

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-27 17:03:40 -06:00
Romain Naour
6989f7ba16 net: ksz9477: add support for KSZ GbE switches using SPI bus
The Microchip KSZ Gigabit Ethernet Switches support
SGMII/RGMII/MII/RMII with register access via SPI, I2C, or MDIO.

Since this driver is now able to check the underlying bus type,
handle the case when the SPI bus is used.

The SPI bus is only used for 8/16/32 wide access of registers.

Reword Kconfig option to include SPI bus support.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
d164577fdb net: ksz9477: prepare ksz9477 without I2C support
With the upcoming ksz9477 SPI support added, the I2C support
will be optional. Either the I2C or the SPI bus will be used.

For now, DM_I2C is still mandatory.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
8a63113de0 net: ksz9477: rename ksz_i2c_probe() to ksz_probe()
In order to support management bus other than the I2C, rename
ksz_i2c_probe() to ksz_probe() since this function is no longer
specific to the I2C bus.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
9c4413b246 net: ksz9477: store ksz bus operations functions
The ksz9477 Linux kernel driver is based on regmap API to seamlessly
communicate to switch devices connected via different buses like SPI
or I2C. The current regmap implementation in U-Boot only supports
memory-mapped registers access [1].

Until regmap API with bus support is available in U-boot, introduce
struct ksz_phy_ops to store low-level ksz bus operations (I2C for now).

[1] https://lists.denx.de/pipermail/u-boot/2018-May/329392.html

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
b507f1a507 net: ksz9477: set i2c bus offset length only when needed
In order to add ksz9477 SPI bus support, check parent bus
is an I2C bus before calling i2c_set_offset_len().

Doing so, ksz_i2c_probe() will now return an error (-EINVAL) if
the parent bus is not the one expected by the ksz-switch u-boot
driver.

Indeed, the DSA KSZ devicetree binding doesn't specify anything
about the underlying bus between the SoC and the DSA switch, so
the same "compatible" string can be used wathever the management
interface used (SPI or I2C).

The ksz-switch u-boot driver currently only support I2C interface
but will match a compatible "microchip,ksz9xxx" located under
under an SPI bus node.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
04c183c542 net: ksz9477: rename udevice_id tab to ksz_ids
The DSA KSZ devicetree binding doesn't specify anything about the
underlying bus between the SoC and the DSA switch, so the same
"compatible" string can be used wathever the management interface
used. The driver must be able to access the underlying bus without
any help from the compatible string (like for TPM2 TIS devices).

So, rename udevice_id tab to ksz_ids since it's not specific to i2c
bus.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
2708c81672 net: ksz9477: add KSZ9896 switch support
Add support for the KSZ9896 6-port Gigabit Ethernet Switch to the
ksz9477 driver.

The KSZ9896 is similar to KSZ9897 but has only one configurable
MII/RMII/RGMII/GMII cpu port.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
5b87af441f net: ksz9477: remove dev_set_parent_priv() call
The ksz9477 is currently the only driver using dev_set_parent_priv()
outside of the driver model. Also, there was no explanation in the
commit adding ksz9477 driver and why dev_set_parent_priv() is
required.

Actually there is a typo in ksz_mdio_probe() while retrieving
the parent (switch@0) private data:

-	priv->ksz = dev_get_parent_priv(dev->parent);
+	priv->ksz = dev_get_priv(dev->parent);

Printing the address of struct ksz_dsa_priv *priv allows
to notice the slight difference:

ksz_i2c_probe: ksz_dsa_priv *priv 0xfdf45768 // address of the saved priv
ksz_mdio_bind: ksz_dsa_priv *priv 0xfdf45798 // address returned by dev_get_parent_priv(dev->parent)
ksz_mdio_bind: ksz_dsa_priv *priv 0xfdf45768 // address returned by dev_get_priv(dev->parent)

The ksz_mdio driver get the wrong data and without
dev_set_parent_priv() the mdio driver fail to access the underlying
bus.

While it doesn't cause any issue with I2C bus, it override the
per-child data used by the SPI bus (struct spi_slave) and prevent
further bus access (even with sspi command).

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
6df5c5aee3 net: ksz9477: move struct ksz_dsa_priv *priv declaration
struct ksz_dsa_priv *priv should be declared before dev_dbg()

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Frank Sae
95adf607d3 net: phy: motorcomm: Add driver for Motorcomm YT8821 2.5G ethernet phy
Add a driver for the motorcomm YT8821 2.5G ethernet phy which works in
2500base-x mode.

Verify the driver on BPI-R3(with MediaTek MT7986(Filogic 830) SoC) evb.

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
2024-10-27 10:19:02 -06:00
Frank Sae
a1211a5f6b net: phy: motorcomm: Optimize phy speed mask to be compatible to YT8821
YT8531 as Gigabit transceiver uses bit15:14(bit9 reserved default 0) as phy
speed mask, YT8821 as 2.5 Gigabit transceiver uses bit9 bit15:14 as phy
speed mask.

Be compatible to YT8821, reform phy speed mask and phy speed macro.

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
2024-10-27 10:19:02 -06:00
Hanyuan Zhao
ba30f462a2 net: dc2114x: remove the pass all multicast flag in operation mode settings
Remove the OMR_PM flag and choose 16 perfect filtering mode since in
modern networks there're plenty of multicasts and set ORM_PM flag will
increase the dc2114x's workload and ask the U-Boot to handle packets
not related to itself. And most of the time, U-Boot does not need this
feature.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
c303f4a0dd net: dc2114x: allow users to decide how to tx packets according to IP core
Some IP cores of dc2114x or its variants do not comply so well with
the behaviors described by the official document. Originally this
driver uses only one tx descriptor and organizes it as a ring buffer,
which would lead to a problem that one packet would be sent twice.
This commit adds support to prevent this bug if you are using IP
cores with this issue, by using multiple tx descriptors and
organizing them as a real well-defined ring buffer.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
5fa3e10cec net: dc2114x: allow users to decide whether to detect the tx No Carrier errors
Some IP cores of dc2114x or its variants do not comply so well with
the behaviors described by the official document. A packet could be
sent successfully but reported with No Carrier error. Latest drivers
of this IP core have not detect this error anymore.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
8c18c53164 net: dc2114x: remove unused lines and change the var and print types
This commit fixes a problem that even though the network card does not report
any issues in transmitting a setup frame, the driver prints the error status
every time. Let's set it for debug use.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
23edc8f6a6 net: dc2114x: add support for CPUs that have cache between the memory and the card
This commit adds support for the MIPS and LoongArch CPUs, which would use cache
after they jump into U-Boot. This commit requests the CPU to return the
addresses in uncached windows and flushes the cache in need, to make sure the
memory between the CPU and the network card is in consistency.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
26d88de9e5 net: dc2114x: set the card number to start at zero
Otherwise the number might get kind of weird.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
a35aa5a0c1 net: dc2114x: get mac address from environment
Let this old driver work like the other newer network card drivers, loading the
MAC address from environment, which could be more flexible to set.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
76146b90e7 net: dc2114x: add support for platforms that don't have pci controllers
There're a few ethernet IP cores which have the same functions with dc2114x,
and can be connected to CPU by AXI or other buses. This commit adds support
for the platforms that do not have PCI controllers, using MMIO to communicate
with the dc2114x IP core.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Tom Rini
8963d433eb Merge tag 'u-boot-rockchip-20241026' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/22993

- New boards:
        rk3566: Hardkernel ODROID-M1S
        rk3588s: Hardkernel ODROID-M2
        rk3588: NanoPC-T6 LTS
- Migrate to use USB_DWC3_GENERIC for rk3328
- Other board level config and dts update
2024-10-26 08:10:31 -06:00
Jonas Karlman
7cec3e7019 rockchip: rk3588-nanopc-t6: Add support for NanoPC-T6 LTS
Update defconfig to enable features included in pending upstream DT and
implement board_fit_config_name_match() to load correct DT for LTS and
non-LTS version of the NanoPC-T6.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:48 +08:00
Jonas Karlman
6e751eed97 adc: rockchip-saradc: Use vdd-microvolts prop as fallback
Change to use vdd-microvolts prop value as voltage reference when the
supply regulator is missing or when DM_REGULATOR=n is used.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:48 +08:00
Jonas Karlman
bcbfd1bb37 adc: Allow use of adc with DM_REGULATOR disabled
When DM_REGULATOR=n is used the device_get_supply_regulator() function
always return -ENOSYS.

Change to treat missing support for regulators as a missing optional
vdd/vss-supply regulator to reduce error messages being logged.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:48 +08:00
Jonas Karlman
d1c38bb4a8 rockchip: rk3588-nanopc-t6: Drop upstream props from u-boot.dtsi
The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes from u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:48 +08:00
Marcin Juszkiewicz
ea42f43c56 arm64: dts: rockchip: add SPI flash on NanoPC-T6
FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
It is populated with 32MB one on LTS version.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: a22a629c63b1addcf2d81eaf30383c1deca5b7a9 ]

(cherry picked from commit 7588da65fdf09c7de9f903780c212a8ae96f2866)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Marcin Juszkiewicz
9a614e1b3d arm64: dts: rockchip: add NanoPC-T6 LTS
In the LTS (2310) version the miniPCIe slot got removed and USB 2.0
setup has changed. There are two external accessible ports and two ports
on the internal header.

There is an on-board USB hub which provides:
- one external connector (bottom one)
- two internal ports on pin header
- one port for m.2 E connector

The top USB 2.0 connector comes directly from the SoC.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-4-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: db1dcbe5f752d423421f77d54d246398b196f670 ]

(cherry picked from commit f4a834fbc8cdb40fddd63d083e8d1c6189ba62dc)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Marcin Juszkiewicz
a823d7fd79 arm64: dts: rockchip: move NanoPC-T6 parts to DTS
MiniPCIe slot is present only in first version of NanoPC-T6 (2301).

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-3-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: aea8d84070fe0846961deb23228d9dd3f8caefb3 ]

(cherry picked from commit 697963b1c22336a44ac2e33536c652aae1671b3d)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Marcin Juszkiewicz
48c0c5b00b arm64: dts: rockchip: prepare NanoPC-T6 for LTS board
FriendlyELEC introduced a second version of NanoPC-T6 SBC.

Create common include file and make NanoPC-T6 use it. Following
patches will add LTS version.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-2-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: d14f3a4f1feabb6bb5935bf3b275a1e6bf2208eb ]

(cherry picked from commit e8b52bdfe5a1444edd1b9bb7cc10b9781d72cc84)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Jonas Karlman
44c923e5a7 rockchip: rk3399-pinephone-pro: Drop upstream props from u-boot.dtsi
The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes in u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Jonas Karlman
1308505974 rockchip: rk3588-rock-5b: Drop upstream props from u-boot.dtsi
The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes in u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Alex Shumsky
ed4ae73862 rockchip: board: Increase rng-seed size to make it sufficient for modern Linux
Increase rng-seed size to make Linux happy and initialize rng pool instantly.
Linux 5.19+ requires 32 bytes of entropy to initialize random pool, but u-boot
currently provides only 8 bytes.
Linux 5.18 and probably some versions before it used to require 64 bytes.
Bump min value to 64 bytes to be on a safe side.

Boot with 8 byte rng-seed (Linux 6.11):
    # dmesg | grep crng
    [   12.089286] random: crng init done
Boot with 32 byte rng-seed (Linux 6.11):
    # dmesg | grep crng
    [    0.000000] random: crng init done

Linux source references:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/char/random.c?h=v5.19#n551
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/char/random.c?h=v5.18#n236

Signed-off-by: Alex Shumsky <alexthreed@gmail.com>
Fixes: d2048bafae40 ("rockchip: board: Add board_rng_seed() for all Rockchip devices")
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Tom Rini
47423b81c2 Merge tag 'u-boot-imx-master-20241025a' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22989

- Remove unneeded USB board code and fix reset on mx6ul_14x14_evk.
- Update fastboot buffer size/address for verdin-imx8m{m|p}.
- Fix imxrt1050-evk boot and convert it to standard boot.
- Fix imx8qxp-mek and imx8qm-mek boot.
- Add support for the i.MX93 9X9 QSB board.
- Make livetree API to work on i.MX.
- Set sane default value for i.MX8M SPL_LOAD_FIT_ADDRESS.
- Deduplicate DH i.MX8MP/i.MX6 DHSOM defconfigs.
- Select default TEXT_BASE for i.MX6/i.MX7.
- Several updates for DH i.MX8MP DRC02.
2024-10-25 18:51:05 -06:00
Marek Vasut
0ccff7f8dc ARM: imx: soc: Move default TEXT_BASE for i.MX7
Move i.MX7 TEXT_BASE/SPL_TEXT_BASE to Kconfig and common/spl/Kconfig
which is the best practice.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-10-25 20:22:01 -03:00
Marek Vasut
304eb6ceea ARM: imx: soc: Select default TEXT_BASE for i.MX6
Select default U-Boot and SPL text base for the i.MX6 SoC. The U-Boot
and SPL text base is picked as the one used by various i.MX6 boards.
Update all the boards.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-10-25 20:21:15 -03:00
Jesse Taube
4bc57d7f34 ARM: dts: imxrt1170: Fix default cells value warnings
Add #address-cells and #size-cells to the memory node to fix warnings

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2024-10-25 20:13:02 -03:00
Jesse Taube
9e5d462a37 configs: imxrt1050-evk: Enable standard boot
Enable standard boot support and add default environments for the
imxrt1050-evk board.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2024-10-25 20:12:15 -03:00
Jesse Taube
1a8d89b7ab imx: imxrt1050-evk: Fix missing clocks for mmc
Two of the clocks required by the usdhc1 controller are missing from the
clock controller node. A recent change enables all the clocks in the
esdhc node, which fails as they are not defined in the clock controller.

Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API")
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
2024-10-25 20:11:24 -03:00
Jesse Taube
1ecbbdda5f imx: imxrt*: Fix binman breaking boot
The init_r parsing of U-Boot device tree to search the binman
information errors. set CONFIG_BINMAN_FDT to no to fix this.

Fixes: 7079eeb72fc ("imx: imxrt1050-evk: Add support for SPI flash booting
s")
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2024-10-25 20:10:40 -03:00
Marek Vasut
4717f386af arm64: imx: Deduplicate DH i.MX6 DHSOM defconfig
Deduplicate defconfigs for all DH i.MX6 DHSOM by including common
configs/imx_dhsom_defconfig . This does introduce changes to the
board configuration, namely it enables commands used on all DHSOM
devices consistenty, the prompt is changed to u-boot=>, support for
booting non-Linux OS which was likely never used is disabled, GPT
partition table support is enabled, generic MTD support is enabled,
LED support is enabled, DM PHY, PMIC and regulator support is also
enabled, KASLR command is enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-25 20:09:31 -03:00
Marek Vasut
b2a39e4cb8 arm64: imx: Deduplicate DH i.MX8MP DHSOM defconfigs
Deduplicate defconfigs for all DH i.MX8MP DHSOM by factoring out the
common parts into generic _dhsom_defconfig and including those using
the #include <configs/...> preprocessor macro, which is applicable to
defconfigs as well. This enables CMD_EXPORTENV on all iMX8MP DHSOM
systems to be consistent with other DHSOM systems.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-25 20:09:31 -03:00
Marek Vasut
1e99444958 arm64: imx: imx8mp: Disable PCA954x I2C mux on DH i.MX8MP DRC02 and PicoITX
Neither the DRC02 nor PicoITX carrier board contains the PCA954x I2C mux
chip, the chip is only present on PDK3 carrier board. Disable support for
the PCA954x mux chip and I2C mux altogether on both i.MX8MP DHCOM DRC02 and
PicoITX.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-25 20:09:31 -03:00
Marek Vasut
19aa2a73f1 arm64: imx: imx8mp: Disable PCI support on DH i.MX8MP DHCOM SoM on DRC02 board
The DRC02 carrier board does not expose PCIe in any way, disable PCIe support.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-25 20:09:31 -03:00
Marek Vasut
8447ded979 arm64: imx: imx8mp: Enable DM regulator on DH i.MX8MP DHCOM SoM on DRC02 board
Make sure DM regulator support is enabled on this board, just like on all
the other DH i.MX8MP DHCOM SoM based boards.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-25 20:09:31 -03:00
Tom Rini
deafcdc8e0 Merge patch series "Allow showing the memory map"
Simon Glass <sjg@chromium.org> says:

This little series adds a new 'memmap' command, intended to show the
layout of memory within U-Boot and how much memory is available for
loading images.

Link: https://lore.kernel.org/r/20241021081934.289473-1-sjg@chromium.org
2024-10-25 14:22:36 -06:00
Simon Glass
9252b7f867 meminfo: Show the lmb records
Add the lmb records onto the end of the memory map.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-25 14:22:24 -06:00
Simon Glass
1c30f7a844 lmb: Export the lmb data structure
Provide a way to access this data structure so that the meminfo command
can use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-10-25 14:22:24 -06:00
Simon Glass
f18c048e6e cmd: Update the meminfo command to show the memory map
U-Boot has a fairly rigid memory map which is normally not visible
unless debugging is enabled in board_f.c

Update the 'meminfo' command to show it. This command does not cover
arch-specific pieces but gives a good overview of where things are.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-25 14:22:24 -06:00
Simon Glass
8306c3b035 cmd: Move meminfo command into its own file
In preparation for expanding this command, move it into a separate file.
Rename the function to remove the extra underscore. Update the number of
arguments to 1, since 3 is incorrect.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-10-25 14:22:24 -06:00