The device tree has evolved over time, so re-sync. This also
partial reverts one change on the PCIe, because U-Boot doesn't
have a proper driver. However, since the clock is configured
to generate a 100MHz reference clock by default, a proper driver
isn't really necessary.
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
One fix makes the reboot more robust on some older board, another one
stabilises the initial clock setup on the A10/A20.
Two patches make sure our DRAM init does not actually change the content
of the DRAM array, which allows to use DRAM for Linux' pstore
functionality.
We get SPI support for U-Boot proper for one more SoC, that patch was
lingering around for a while, and should not affect other SoCs, so I am
merging this now.
As an added bonus, we get the defconfig file for a new board, the DT was
already synced from the kernel tree.
The CI looked happy with changes, and I tested them on five different
boards with different SoCs.
SolidRun Armada-388 SoM has an i2c bus supporting on-som eeprom, and
peripherals on a carrier.
armada-38x.dtsi disables this bus by default, it should be enabled by
som or carrier dts.
Linux has moved i2c0 from helios-4 board dts to som dtsi, including
status, pinctrl and clock speed.
Copy these settings from mainline.
This fixes accessing i2c bus from u-boot commandline.
Signed-off-by: Josua Mayer <josua@solid-run.com>
The Turris Omnia contains the Marvell 88E6176 ethernet switch. Add
config options and device tree to enable the support.
Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Signed-off-by: Marek Behún <kabel@kernel.org>
Commit 5d7a95f49999 ("imx6ul/imx6ull: synchronise device trees with
linux") removed the display timings from the board device tree whereas
they are still needed by the mxsfb driver.
Add the timings back (the correct ones) in the
imx6ul-opos6uldev-u-boot.dtsi file and remove them from the
opos6uldev.env file.
Update the opos6uldev_defconfig file so that the LCD turns on at boot.
Fixes: 5d7a95f49999 ("imx6ul/imx6ull: synchronise device trees with linux")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
The OrangePi Zero 2W is a tiny development board featuring the Allwinner
H618 SoC, shipping with up to 4GB of LPDDR4 DRAM, a mini-HDMI connector,
two USB Type-C sockets and a 16MB SPI NOR flash.
There is an FPC connector to connect an expansion board, which sports
two more USB Type-A sockets and a 100MBit Ethernet port. Support for
the expansion board is not in the DT yet, probably a DT overlay would
cover this in the future.
Add a defconfig file selecting the right drivers and DRAM options.
Since the .dts file was synced from the Linux kernel repo already, we
just need to add one line to the Makefile to actually build the .dtb.
The DRAM parameters were derived from the values found in the BSP DRAM
drivers on the SPI NOR flash.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The same U-Boot binary is compatible with multiple Verdin AM62 board
variants. However, some of the SoC models can only operate at a maximum
speed of 1 GHz.
Previously, the boards with lower-speed grades were running at
overclocked speeds, leading to kernel complaints about unsupported
configurations.
To resolve this issue, the operating speed has been decreased to the
maximum allowable value across all Verdin AM62 board variants. As a
result, there is a regression in overall boot time, increasing by around
200 milliseconds for the faster SoC variant.
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Francesco Dolcini <francesco.dolcini@toradex.com> says:
This series fixes two regressions affecting multiple Toradex boards
(i.MX, TI and TEGRA based) and targets the current master, e.g. v2024.04
release.
U-Boot `reset` command is broken on all Tordex i.MX6* based SoMs since
v2023.07, this series fixes it enabling the `wdt-reboot` driver.
Since v2024.04-rc1 reading the Toradex configuration block is not working
properly anymore, the serial number and the hardware version are not read
correctly, preventing the board from functioning correctly (wrong mac address,
wrong DT, ...). This is fixed by reading the config block in `EVT_SETTINGS_R`
and adding a toradex sysinfo driver. In addition to that, we now use a random
mac address in case the config block is invalid.
Reported-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Closes: https://lore.kernel.org/all/CAKZ1LvM45MB8N0CqgU+C7i9=Bjb6kqNTxWo2Tv407HKLWtCMkA@mail.gmail.com/
Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Closes: https://lore.kernel.org/all/e40ed93bd8f371ec56b8fc451dcb458f3ce6dcba.camel@toradex.com/
Reported-by: Francesco Dolcini <francesco@dolcini.it>
Closes: https://lore.kernel.org/all/ZY2ZDWAQuTlRjV9H@francesco-nb/
commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()")
introduced a regression that 'reset' command unable to reset
imx6 and imx6ull based Toradex's modules in the u-boot.
This change enables a watchdog-based sysreset driver for
Toradex's colibri-imx6, colibri-imx6ull (with nand and emmc)
and apalis-imx6 which solves the reset command regression on
these modules.
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Fixes: 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()")
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
This commit introduces support for the Toradex sysinfo driver in U-Boot,
which uses information from Toradex config block to print correct
board model.
In case the Toradex config block is not present sysinfo prints the model
of the board provided by device tree removing per board specific prints.
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # Verdin iMX8M Plus
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Pull in the recent changes to the RZ/G2L device tree and related dtsi
files so that we're aligned with Linux v6.7 (commit 0dd3ee311255).
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Add support for booting the imxrt1050-evk from spi.
Add imximage config and the ability for SPL to boot from NOR.
Enable binman in Kconfig and device tree for imxrt* as it is used to
prepend fspi_header.bin to SPL and u-boot.img.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
The Sielaff i.MX6 Solo board is a control and HMI board for vending
machines. Add support for this board.
The devicetree files are taken from pending changes in the Linux
kernel that are available from linux-next and will likely be
part of Linux v6.9.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Add mmc alias so that the eMMC is mmc0 and the SD card
is mmc1 to have a well defined device numbering scheme.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Ian Ray <ian.ray@gehealthcare.com>
The conversion to DM_SERIAL is mandatory, so do the conversion.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Ian Ray <ian.ray@gehealthcare.com>
kr260 revA/revA01 is using discrete oscilator for DP (27MHz) and si5332 for
other clocks but clocks are different compare to kv260 that's why fix it to
aligned with the latest schematics.
On the other handle kr260 revB/revA03 also contains 74.25 MHz discrete
clock chip for SLVC-EC output which is not defined.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e87ae94979c6efc909740bb1a569505042e4f876.1706626255.git.michal.simek@amd.com
Describe 25Mhz fixed oscilator which is providing clock for PL based
ethernet IPs. Physicially it is one chip but it is described as 2 fixed
clock to be aligned with other SOM versions which were using integrated
clock generators where clocks could be adjusted via i2c (si5332 chips).
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c430aeacaa76d9f61ed3f874f721a33049f45eb9.1706514396.git.michal.simek@amd.com
Board description describes the hard part of chip (PS) but programmable
logic (PL) part is not described in this file. But clocks on the board are
not only connected to PS but also wired to PL. And because two revisions
are available where revA is using one si5332 and revB multiple clock chips
using the same clock labels helping with keeping only one device tree
overlay which targets PL. That's why synchronize clock labels and use
labels from revB which are more generic.
Unfortunately if there is driver for si5332 chip split could happen again
but it is still worth to do it now and solve this issue when occurs.
Reported-by: Sagar Karmarkar <sagar.karmarkar@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/abac6069e6029ed4076ec7b9d6b33604b6072aa3.1706253871.git.michal.simek@amd.com
Without 'silabs,skip-recall' property, the driver on System Controller
re-calibrates the output clock frequency at probe() time based on the NVRAM
setting. This re-calibration causes a glitch on the output clock. At
power-on, Versal is also booting and expecting a glitch-free clock for
its correct operation. System Controller should skip the re-calibration
step to prevent any clock instability for Versal.
Signed-off-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bbb2322c94503f0e6b369c60312b7546500fad95.1706170068.git.michal.simek@amd.com
The SPL clock code does configure the ECSPI clock frequency, which has
to match the mxc-spi driver configuration for successful SPI NOR boot.
Drop the assigned-clock from DT ecspi1 node on this board to let the
SPL clock code do the configuration and keep it aligned with the driver
expectation.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Initial support for the Renesas Gray Hawk CPU and BreakOut boards.
The arch/arm/dts/r8a779h0-gray-hawk-cpu.dtsi is extended version of:
https://lore.kernel.org/linux-renesas-soc/b657402113267acd57aece0b4c681b707e704455.1706194617.git.geert+renesas@glider.be/
The version currenty submitted upstream lacks functionality which is
present in this series. Once the upstream support implements that
missing functionality, these DTs will be updated to match.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Add Renesas R8A779H0 V4M DT extras for U-Boot.
Until the RPC node becomes part of main DT, keep it here as
an extension so that board code can enable and use the RPC
to access SPI NOR.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Add initial support for the Renesas R8A779H0 (R-Car V4M) SoC.
The current version is imported and modified from:
https://lore.kernel.org/linux-renesas-soc/4107bc3d7c31932da29e671ddf4b1564ba38a84c.1706194617.git.geert+renesas@glider.be/
The modifications contain nodes from previous version
which are useful in U-Boot and not part of the Linux
kernel DT yet. The following nodes were added:
- pfc
- gpio0..gpio7
- i2c0..i2c3
- avb0..avb2
- mmc0
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add smbios information for Pine64 RockPro64 board and enable in
config
Signed-off-by: Shantur Rathore <i@shantur.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit enables support for DM_SERIAL in the vexpress_ca9x4 boards.
When running the board with the DM_SERIAL driver, the board ran out of
memory in SPL when initialising the DM serial driver.
Thus this required an increase in the pre-allocated SRAM memory. I did
increase it to 0x800, and it now works graciously.
It could probably be set lower, but I do not see any reason not to use the
available SRAM at this point.
Also adds stdout-path to the 'chosen' node in the device tree.
Signed-off-by: Ole P. Orhagen <ole.orhagen@northern.tech>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Writing to eMMC using HS200 mode work more reliably then other modes on
RK356x boards.
Add device tree props and enable Kconfig options for eMMC HS200 mode on
the generic RK3566/RK3568 board. Also enable the pinctrl driver in SPL
and add missing rk3568-generic.dtb to Makefile.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Testing has shown that writing to eMMC using DDR52 mode does not seem to
work on RK356x and RK3588 boards.
A simple test of writing a single block to e.g. sector 0x4000 fails:
# Rescan using DDR52 mode
=> mmc rescan 4
# Write a single block to sector 0x4000 fails with ERROR
=> mmc write 20000000 4000 1
With the MMC_SPEED_MODE_SET Kconfig option enabled.
Fix this by removing the mmc-ddr-1_8v prop from sdhci nodes in affected
board u-boot.dtsi files.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove unnecessary status props from rk35xx u-boot.dtsi files, regular
device tree files or default value already enable the affected nodes.
Also reorder bootph-pre-ram and clock-frequency props alphabetically in
rk3588s-u-boot.dtsi uart2 node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
