1222 Commits

Author SHA1 Message Date
Simon Glass
521d377f78 sandbox: Drop video-sync in serial driver
With sandbox, when U-Boot is waiting for input it syncs the video
display, since presumably the user has finished typing.

Now that cyclic is used for video syncing, we can drop this. Cyclic
will automatically call the video_idle() function when idle.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-31 16:56:06 +02:00
Tom Rini
b0ee3fe642 arm: ti: Remove omap4 platform support
There are no longer any OMAP4 platforms in U-Boot, remove the related
functionality.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-23 10:37:48 -06:00
Marek Vasut
027fb6f0cb drivers: serial: Remove duplicate newlines
Drop all duplicate newlines. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-22 10:53:06 -06:00
Tom Rini
475aa8345a Merge patch series "mediatek: cumulative trivial fix for OF_UPSTREAM support"
Christian Marangi <ansuelsmth@gmail.com> says:

This is an initial series that have all the initial trivial
fixes required for usage of OF_UPSTREAM for the mediatek SoC

This also contains the pcie-gen3 driver and the required tphy
support driver to make it work.

Subsequent series will follow with conversion of the mtk-clk
to permit usage of OF_UPSTREAM and upstream clk ID.

MT7981, MT7986 and MT7988 migration to upstream clock ID
is complete and working on MT7623.

Series CI tested with PR: https://github.com/u-boot/u-boot/pull/590
2024-07-08 11:56:59 -06:00
Christian Marangi
8bae5bf622 serial: mediatek: add special handling for highspeed and linux compat
Upstream linux serial driver use a different logic to setup serial regs.

They have 2 interval:
- < 115200 we use lowspeed regs and 16 * baud
- >= 115200 we use highspeed

We currently use force_highspeed property to force usage of highspeed
regs even with low baud rate.

Add special handling if the upstream compatible is used where we just
apply the same interval with anything >= 115200 in highspeed simulating
force_highspeed.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-07-08 11:45:50 -06:00
Christian Marangi
41d2cab1fc serial: mediatek: add support for bus clock and enable it
Upstream linux also provide the additional optional bus clock.

Add support for it and also enable the baud and bus clock on probe.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-07-08 11:45:50 -06:00
Tom Rini
7c9c5c0562 Merge patch series "xtensa: Enable qemu-xtensa board"
Jiaxun Yang <jiaxun.yang@flygoat.com> says:

Hi all,

This series enabled qemu-xtensa board.

For dc232b CPU it needs to be built with toolchain[1].

This is a side product of me investigating architectures
physical address != virtual address in U-Boot. Now we can
get it covered under CI and regular tests.

VirtIO devices are not working as expected, due to U-Boot's
assumption on VA == PA everywhere, I'm going to get this fixed
later.

My Xtensa knowledge is pretty limited, Xtensa people please
feel free to point out if I got anything wrong.

Thanks
[1]: https://github.com/foss-xtensa/toolchain/releases/download/2020.07/x86_64-2020.07-xtensa-dc232b-elf.tar.gz
2024-07-04 16:11:08 -06:00
Jiaxun Yang
eb2daa0f4e drivers: serial: Add xtensa semihosting driver
Add xtensa semihosting driver.

It can't use regular semihosting driver as Xtensa's has it's own
semihosting ABI.

Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04 16:08:37 -06:00
Rasmus Villemoes
945fc27822 serial: ns16550: fix comment to mention schedule instead of watchdog_reset
watchdog_reset() is no more. Make the comments match the code and
today's reality.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-06-16 12:14:00 +02:00
Tom Rini
03de305ec4 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-20 13:35:03 -06:00
Tom Rini
d678a59d2d Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19 08:16:36 -06:00
Tom Rini
1afa75c087 Merge patch series "arm: Add Analog Devices SC5xx Machine Type"
Greg Malysa <greg.malysa@timesys.com> says:

This series adds support for the ADI SC5xx machine type and includes two
core drivers that are required for being able to boot any board--a UART
driver, the gptimer driver which is used as a clock reference (CNTVCNT
is not supported on the armv7 sc5xx SoCs) and the clock tree driver. Our
corresponding Linux support relies on u-boot configuring the clocks
correctly before booting, so it is not possible to boot any board
without the CGU/CDU configuration happening here. There are also no
board files, device trees, or defconfigs included here, but some common
definitions that will be used to build board files currently are. The
sc5xx SoCs themselves include many armv7 families (sc57x, sc58x, and
sc594) all using an ARM Cortex-A5, and one armv8 family (sc598) indended
to be a drop-in replacement for the SC594 in terms of peripherals, with
a Cortex-A55 instead.

Some of the configuration code in dmcinit and clkinit is quite scary and
causes a lot of checkpatch violations. It is modified from code
initially provided by ADI, but it has not been fully rewritten. There's
a question of how important it is to clean up this code--it has some
quality violations, but it has been in use (including in production) for
over two years and is known to work for performing the low level SoC
initialization, while a rewrite might introduce timing or sequence bugs
that could take a significant amount of time to detect in the future.
2024-05-07 19:24:07 -06:00
Nathan Barrett-Morrison
8af2e141e1 drivers: serial: Add in UART for ADI SC5XX-family processors
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
2024-05-07 19:24:00 -06:00
Tom Rini
a8604d0ce1 serial: Remove <common.h> and add needed includes
Remove <common.h> from this driver directory and when needed
add missing include files directly.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07 08:00:56 -06:00
Sumit Garg
512672492c
serial_msm: Enable RS232 flow control
SE HMIBSC board debug console requires RS232 flow control, so enable
corresponding support if RS232 gpios are present.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:23 +02:00
Sumit Garg
6e992a6bc8
apq8016: Add support for UART1 clocks and pinmux
SE HMIBSC board uses UART1 as the main debug console, so add
corresponding clocks and pinmux support. Along with that update
instructions to enable clocks for debug UART support.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:22 +02:00
Caleb Connolly
69e9b3428b
serial: msm: calculate bit clock divider
The driver currently requires the bit clock divider be hardcoded in
devicetree (or use the hardcoded default from apq8016).

The bit clock divider is used to derive the baud rate from the core
clock:

  baudrate = clk_rate / csr_div

clk_rate is the actual programmed core clock rate which is returned by
clk_set_rate(), and this UART driver only supports a baudrate of 115200.
We can therefore determine the appropriate value for UARTDM_CSR by
iterating over the possible values and finding the one where the
equation above holds true for a baudrate of 115200.

Implement this logic and drop the non-standard DT bindings for this
driver.

Tested on dragonboard410c.

Tested-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:16 +02:00
Robert Marko
615a3e909e
serial: msm_serial: remove .clk_rate from debug UART
MSM serial in DEBUG UART mode is trying to set .clk_rate, but the
msm_serial_data structure does not have such property at all, so lets
remove it as otherwise it will fail compiling.

Fixes: 90023bdfe979 ("serial: msm: add debug UART")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:14 +02:00
Robert Marko
6b163a63e5
serial: allow selecting MSM debug UART with ARCH_IPQ40XX
Currently, DEBUG_UART_MSM depends on ARCH_SNAPDRAGON only, but IPQ40XX
devices also use the same UART HW so they can also use the debug UART.

So, allow selecting DEBUG_UART_MSM when using ARCH_IPQ40XX as well.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:13 +02:00
Peng Fan
1e635a319d serial: lpuart: use ipg clk for i.MX7ULP
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-04-15 08:09:31 -03:00
Tom Rini
843143303c Xilinx changes for v2024.07-rc1
xilinx:
 - Do not call env_get_location when !ENV_IS_NOWHERE
 - Add FDT_FIXUP_PARTITIONS support
 - Fix legacy format MAC decoding
 
 zynqmp:
 - Enable semihosting SPL support
 - DT updates
 - Kconfig resort/cleanup
 - Don't describe second image/capsule if !SPL
 - Add support for dfu/capsule description via MTD
 - Support JTAG as alternative boot mode
 - Add support for TEG soc variant
 
 zynqmp-kria:
 - Wire usb4 boot device
 - Update SDIO tristate pin configuration
 - Disable SPI_FLASH_BAR to avoid issue with SPI after update
 
 mbv:
 - Enable SPL and binman
 - Small platform changes
 
 zynqmp-nand:
 - Error out in case of unsupported SW ECC
 - Clean error path
 
 versal-net:
 - Support multiple locations for variables
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZhaRdgAKCRDKSWXLKUoM
 IS6LAKCdXJaEtlNLSC5IxeRJGmSTN4xPsACfdVL3mMzOZ1gw2+17uW1kHzzOgM4=
 =vDHW
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2024.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2024.07-rc1

xilinx:
- Do not call env_get_location when !ENV_IS_NOWHERE
- Add FDT_FIXUP_PARTITIONS support
- Fix legacy format MAC decoding

zynqmp:
- Enable semihosting SPL support
- DT updates
- Kconfig resort/cleanup
- Don't describe second image/capsule if !SPL
- Add support for dfu/capsule description via MTD
- Support JTAG as alternative boot mode
- Add support for TEG soc variant

zynqmp-kria:
- Wire usb4 boot device
- Update SDIO tristate pin configuration
- Disable SPI_FLASH_BAR to avoid issue with SPI after update

mbv:
- Enable SPL and binman
- Small platform changes

zynqmp-nand:
- Error out in case of unsupported SW ECC
- Clean error path

versal-net:
- Support multiple locations for variables
2024-04-10 11:51:58 -06:00
Caleb Connolly
320a3ecef7
serial: msm-geni: support livetree
When using OF_LIVE, the debug UART driver won't be probed if it's a
subnode of the geni-se-qup controller. Add a NOP driver for the
controller to correctly discover its child nodes.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-04 17:46:47 +02:00
Caleb Connolly
8670cb405e
mach-snapdragon: disable power-domains for pre-reloc drivers
Some devices like the UART and clock controller reference an RPM(h)
power domain. We don't support this device in U-Boot, so add
DM_FLAG_DEFAULT_PD_CTRL_OFF to tell DM core not to try and enable the
power domain.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-04 17:46:46 +02:00
Tom Rini
f048104999 Merge tag 'u-boot-socfpga-next-20240319' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
- A new driver in the misc to register setting from device tree. This
  also provides user a clean interface and all register settings are
  centralized in one place, device tree.
- Enable Agilex5 platform for Intel product. Changes, modification and
  new files are created for board, dts, configs and makefile to create
  the base for Agilex5.

Build-tested on SoC64 boards, boot tested on some of them.
2024-03-19 09:10:30 -04:00
Heinrich Schuchardt
25e7d4bf64 serial: move sbi_dbcn_available to .data section
U-Boot SPL loads the device-tree directly behind main U-Boot overlapping
the .bss section. reserve_fdt() is called in board_init_f() to relocate the
device-tree to a safe location.

Debug UARTs are enabled before board_init_f(). With sbi_dbcn_available in
the .bss section the device-tree is corrupted when _debug_uart_init() is
called in the SBI serial driver. Move the variable to the .data section.

Link: https://bugs.launchpad.net/ubuntu/+source/u-boot/+bug/2054091
Fixes: dfe08374943c ("risc-v: implement DBCN based debug console")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2024-03-12 14:36:13 +08:00
Tom Rini
20a0ce574d Prepare v2024.04-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmXvO2YACgkQFHw5/5Y0
 tyxRagwAtLBR/yehfOY5Zw3dKf8kREedas500ueg7nSwV+V2CZO+cwFLrtSVJhXu
 p6dtX0QZxCYidTfaoUOfGLwgvrJoXD/iY6ws8dzVMa9IX2ez3uZDlsPmQG/y2U4i
 rtDn9YgV8oAnLk4hFaaE5vhWfUmtSy6SvJ/foFeQT0B9Er14ep5AII8L/nUcP53w
 FbJ8UVF92i44+zG/0EjpG2pZeftztnVP4YVhU+mbmLLKP49sbrVwFRlo5t+VlB/j
 Q1/RCgxGMPsUG3iNWqIl6rA3VElcZbUm8+YcAy6GqTLOXPxydwBnZVS5UgYapg7y
 Yqu3IMm0LGdXp4klYcdz0tesuFHWan+j227Tme9OLmHgBYBo1WO6zDCITOW1uNVe
 tf3QjIVlrMV4/zglHP/2iceBO1sS49TuzjctCdEBKXb7vZISxgxS7QwmGVVHeigw
 zF4tw0uuzldi+e1yv9rleTIJBN+OuPqUhsyda2Fxq5a2hKW90hv33zzb7ZN5ZvVm
 GlEzhZ6c
 =CqvA
 -----END PGP SIGNATURE-----

Merge tag 'v2024.04-rc4' into next

Prepare v2024.04-rc4
2024-03-11 15:27:20 -04:00
Yang Xiwen
91febe80c9 serial: pl01x: set baudrate when probing
It is found that when DM is enabled, only generic init function is
called in .probe(). Baudrate is never honored. Add a function call
to .setbrg() when probing so that we can update the baudrate of the
serial device.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2024-03-07 07:59:16 -05:00
Marek Vasut
f9aabd4579 ARM: renesas: Rename ARCH_RMOBILE to ARCH_RENESAS
Rename ARCH_RMOBILE to ARCH_RENESAS because all the chips are made
by Renesas, while only a subset of them is from the R-Mobile
line.

Use the following command to perform the rename:

"
$ git grep -l 'ARCH_RMOBILE' | xargs -I {} sed -i 's@ARCH_RMOBILE@ARCH_RENESAS@g' {}
"

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-03-02 14:29:36 -05:00
Caleb Connolly
92781cff6e
serial: msm: fix clock handling and pinctrl
Use the modern helpers to fetch the clock and use the correct property
("clocks" instead of "clock"). Drop the call to pinctrl_select_state()
as no boards have a "uart" pinctrl state and this prints confusing
errors.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-03-01 14:44:36 +00:00
Caleb Connolly
90023bdfe9
serial: msm: add debug UART
Introduce support for early debugging. This relies on the previous stage
bootloader to initialise the UART clocks, when running with U-Boot as
the primary bootloader this feature doesn't work. It will require a way
to configure the clocks before the driver model is available.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-03-01 14:44:35 +00:00
Michal Simek
9600e8d39c riscv: mbv: Moving little_endian variable to data section
SPL is cleaning bss after calling board_init_f. Setting up console is done
and little_endian global variable is cleared which caused that console
stops to work. That's why move it to data seciton now. The patch should be
reverted when bss is cleared before board_init_f is called.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/934dc8871c59265eb9d8012193aa97d9b8bd7f33.1707911544.git.michal.simek@amd.com
2024-03-01 08:41:39 +01:00
Tom Rini
bebf916f9e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-samsung 2024-02-20 08:02:49 -05:00
Sean Anderson
c9309f40a6 treewide: Remove clk_free
This function is a no-op. Remove it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
2024-01-29 22:35:02 -05:00
Sam Protsenko
c2e8b97c60 serial: s5p: Add Exynos850 compatible
Enable serial support for Exynos850 SoC by adding the corresponding
compatible string. No additional changes needed, the driver works as is
on Exynos850. Related USI and PMU configuration is enabled in separate
drivers. The only other dependencies are clock and pinctrl drivers,
which are already enabled too.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-01-24 11:23:20 +09:00
Caleb Connolly
a4ba2a6663
serial: msm-geni: handle devm_clk_get() errors
devm_clk_get() returns an ERR_PTR on failure, not null. Fix the check to
avoid the board crashing when the clock isn't available.

Additionally, add the missing error handling for this function.

Fixes: 324df15a292e ("serial: qcom: add support for GENI serial driver")
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-01-16 12:26:53 +00:00
Caleb Connolly
836b7f4474
serial: msm-geni: don't rely on parent misc device
commit 1b15483deb3f ("misc: add Qualcomm GENI SE QUP device driver")
introduced support for platform-specific oversampling values, necessary
to configure the UART clocks on all platforms at runtime. However it
relies in probing a parent device. Despite the DM_FLAG_PRE_RELOC flag,
this is not done consistently during boot.

Instead, take another approach by relying on ofnode_ helpers to read the
serial engine base address and do the read directly. This fixes early
UART on boards with a non-default oversampling rate.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-01-16 12:26:52 +00:00
Tom Rini
d379150621 Prepare v2024.01-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmVuHrwACgkQFHw5/5Y0
 tyy3Tgv+LB/X0ZR3IHnu1mvQ7kpOFvAjjKr0BUpcEEzsrDZeJnS6sy06m+REez2E
 UmuLeKFj5NUCYXNKtxn2+gVnJt8Tk6ftxhMTiZHmR4Y4NVc5aPtqYmVsv6Q29j0U
 mcg7AGcZTniu9/naNM+ZcDeHzLDAB0whmE9eVfixXVgyitILoLHNdFiQ7W4oR7Kh
 /mBgdMDBS3rqiRi6CuqKUnl4ADX8T3AXaSfi3hqOC5Pj+HPkZSUfyWx31mu9mN1D
 wXTHASZX06Dop25fm/ZSdWk1blBw29WqRiJBdwNatvyC5pqMsotTvAfH2AcHBEYg
 tpoper+WDOBAipt6b6Y1B7q4VPvJ97L9dFCAYqN0nGCe+rkdi+k+cly7M6Ye9xLt
 e7rVUfnKgIMP8jkLcVBYoWkFY5FiJ82O5qjoF5N3dAuHeWacDFsB5TugDTOQvblH
 LWCmcIyU1N9Ma/Ib0rTvNduvpBUYBKXYlD1+rjPZUbTUnfc79mf+ReFpcoW6Kxh+
 bkz81p8P
 =ebIZ
 -----END PGP SIGNATURE-----

Merge tag 'v2024.01-rc4' into next

Prepare v2024.01-rc4

# -----BEGIN PGP SIGNATURE-----
#
# iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmVuHrwACgkQFHw5/5Y0
# tyy3Tgv+LB/X0ZR3IHnu1mvQ7kpOFvAjjKr0BUpcEEzsrDZeJnS6sy06m+REez2E
# UmuLeKFj5NUCYXNKtxn2+gVnJt8Tk6ftxhMTiZHmR4Y4NVc5aPtqYmVsv6Q29j0U
# mcg7AGcZTniu9/naNM+ZcDeHzLDAB0whmE9eVfixXVgyitILoLHNdFiQ7W4oR7Kh
# /mBgdMDBS3rqiRi6CuqKUnl4ADX8T3AXaSfi3hqOC5Pj+HPkZSUfyWx31mu9mN1D
# wXTHASZX06Dop25fm/ZSdWk1blBw29WqRiJBdwNatvyC5pqMsotTvAfH2AcHBEYg
# tpoper+WDOBAipt6b6Y1B7q4VPvJ97L9dFCAYqN0nGCe+rkdi+k+cly7M6Ye9xLt
# e7rVUfnKgIMP8jkLcVBYoWkFY5FiJ82O5qjoF5N3dAuHeWacDFsB5TugDTOQvblH
# LWCmcIyU1N9Ma/Ib0rTvNduvpBUYBKXYlD1+rjPZUbTUnfc79mf+ReFpcoW6Kxh+
# bkz81p8P
# =ebIZ
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 04 Dec 2023 01:47:24 PM EST
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]
2023-12-04 21:39:57 -05:00
Sam Protsenko
33e7ca5a9b serial: s5p: Use dev_read_addr_ptr() to get base address
As the address read from device tree is being cast to a pointer, it's
better to use dev_read_addr_ptr() API for getting that address. The more
detailed explanation can be found in commit a12a73b66476 ("drivers: use
dev_read_addr_ptr when cast to pointer").

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-27 18:04:11 +09:00
Sam Protsenko
a627f2802a serial: s5p: Improve coding style
Just some minor style fixes. No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23 15:24:18 +09:00
Sam Protsenko
e79f630dbf serial: s5p: Use named constants for register values
Get rid of magic numbers in s5p_serial_init() when writing to UART
registers. While at it, use BIT() macro for existing constants when
appropriate.

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23 15:24:18 +09:00
Sam Protsenko
5ad21de6ba serial: s5p: Use livetree API to get "id" property
Use dev_read_u8_default() instead of fdtdec_get_int() to read the "id"
property from device tree, as suggested in [1]. dev_* API is already
used in this driver, so there is no reason to stick to fdtdec_* API.
This also fixes checkpatch warning:

    WARNING: Use the livetree API (dev_read_...)

[1] doc/develop/driver-model/livetree.rst

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23 15:24:18 +09:00
Sam Protsenko
a0615ffc99 serial: s5p: Remove common.h inclusion
It's not really needed here anymore. Remove it, as common.h is going
away at some point.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23 15:24:18 +09:00
Jim Liu
65660bfe85 serial: npcm: support skip uart clock setting
Skip the uart clock setting if CONFIG_SYS_SKIP_UART_INIT is enabled.
Fix divisor error.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-11-22 19:10:04 -05:00
Tom Rini
dca7a8958f Prepare v2024.01-rc3
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmVbZ4QACgkQFHw5/5Y0
 tyzlggwAowkAYxSOUkwhWSbEYctVObZUPF1kDEbWlbskx52ZrQ56nWbfojZPKYdT
 OYe7fNrOJaYpbpU31lJ6U7Jm/iLCHw7vqMBmTJCNNr/BBW5jQ/exEVMa+/ZG640T
 6pTWqAHp3CfqNjBK9bnFmIqWTwrqUCZKNllPfEWNs1Pl00ypJsY9ZYaAw+4I9t0p
 2cG/BrSUyCDkgLYHi0YVUHXWQKYU4LVfz6EASGIOwTrrJGEUJ9EAGJmzgUSC0Zuw
 7qQBwHPXHBkpfP4bOFZ6xSKLp79rHXNSdjx21XW/4yerp4GC16xB+pZWZOSuz2J9
 0anoiSGPh1N81B6aciTOWeCdKPJeXEp1AxqyCcvmwLZrOOs+MSGjbKCUFnjyNtAJ
 hTXzlJQM6tQ3BhGQLY85sNe8/dOF3WNt4RiRM3K87mU8e0pahrYKSj5oUSbcrOBx
 4Hk6rQc33MvyLAYEhSJ3naktA0dPQseleOrXuOGdSWOlFf2sweVEjip4VKBlbUNb
 t3kEfQ9F
 =YBkC
 -----END PGP SIGNATURE-----

Merge tag 'v2024.01-rc3' into next

Prepare v2024.01-rc3
2023-11-20 09:19:50 -05:00
Igor Prusov
13248d66ae treewide: use linux/time.h for time conversion defines
Now that we have time conversion defines from in time.h there is no need
for each driver to define their own version.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com> #at91
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> #qcom geni
Reviewed-by: Stefan Bosch <stefan_b@posteo.net> #nanopi2
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-11-16 18:59:58 -05:00
Patrice Chotard
6261cf6abd serial: stm32: Fix AARCH64 compilation warnings
When building with AARCH64 defconfig, we got warnings, fix them
by using registers base address defined as void __iomem * instead of
fdt_addr_t.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-11-13 10:55:38 +01:00
Sam Protsenko
2227f4c0af serial: s5p: Fix clk_get_by_index() error code check
clk_get_by_index() returns negative number on error. Assigning it to
unsigned int makes the subsequent "ret < 0" check always false, leading
in turn to possible unhandled errors. Change 'ret' variable type to
signed int so the code checks and handles clk_get_by_index() return code
properly.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: cf75cdf96ef2 ("serial: s5p: use clock api to get clock rate")
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-13 16:20:58 +09:00
Nishanth Menon
a94a4071d4 tree-wide: Replace http:// link with https:// link for ti.com
Replace instances of http://www.ti.com with https://www.ti.com

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-11-10 11:01:50 -05:00
Algapally Santosh Sagar
bd9ff681bd serial: zynqmp: Fetch baudrate from dtb and update
The baudrate configured in .config is taken by default by serial. If
change of baudrate is required then the .config needs to changed and
u-boot recompilation is required or the u-boot environment needs to be
updated.

To avoid this, support is added to fetch the baudrate directly from the
device tree file and update.
The serial, prints the log with the configured baudrate in the dtb.
The commit c4df0f6f315c ("arm: mvebu: Espressobin: Set default value for
$fdtfile env variable") is taken as reference for changing the default
environment variable.

The default environment stores the default baudrate value, When default
baudrate and dtb baudrate are not same glitches are seen on the serial.
So, the environment also needs to be updated with the dtb baudrate to
avoid the glitches on the serial.

Also add test to cover this new function.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230921112043.3144726-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Algapally Santosh Sagar
8819892bdb configs: Add support in Kconfig and convert for armada boards
Move the DEFAULT_ENV_IS_RW to Kconfig for easier configuration.
Hence, add the CONFIG_DEFAULT_ENV_IS_RW config to the defconfig files
to allow enabling them for armada boards.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20230921112043.3144726-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00