23743 Commits

Author SHA1 Message Date
Cezary Sobczak
a53389af5e sun20i: set CONFIG_SYS_BOOTM_LEN for RISC-V
If this value is not increased, the error occurs during loading
uncompressed kernel from fitImage:
"Error: inflate() returned -5
Image too large: increase CONFIG_SYS_BOOTM_LEN"

Signed-off-by: Cezary Sobczak <cezary.sobczak@3mdeb.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-18 00:02:45 -05:00
Samuel Holland
00db730a70 sunxi: Use sunxi-common.h for D1 port
This shows the changes needed to sunxi-common.h, so it makes upstreaming
a little bit easier.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-18 00:02:45 -05:00
TekkamanV
5ffe0f6d74 sun20i: Add some variables to the default environment
Signed-off-by: TekkamanV <tekkamanv@163.com>
[Samuel: Only kept the non-Fedora-specific subset of changes]
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-18 00:02:45 -05:00
Samuel Holland
b124274412 sunxi: Add a U-Boot port for the Allwinner D1 Nezha
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-18 00:02:45 -05:00
Samuel Holland
4a432a19ac clk: sunxi: Add support for D1 CCU
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-18 00:02:44 -05:00
Samuel Holland
70bac0b386 dt-bindings: leds: Update common binding
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-18 00:02:44 -05:00
Samuel Holland
da3bea429b Merge branch 'patch/axp-gpio' into allwinner
# Conflicts:
#	arch/arm/mach-sunxi/Kconfig
2022-03-17 23:43:43 -05:00
Samuel Holland
92a3de0b52 Merge branch 'patch/axp-vbus' into allwinner
# Conflicts:
#	arch/arm/include/asm/arch-sunxi/gpio.h
2022-03-17 23:43:38 -05:00
Samuel Holland
5001f243a1 Merge branch 'patch/h3-scp' into allwinner 2022-03-17 23:43:22 -05:00
Samuel Holland
fa2e69b860 gpio: axp: Select variant from compatible at runtime
There are three major variants of the AXP PMIC GPIO functionality (plus
PMICs with no GPIOs at all). Except for GPIO3 on the AXP209, which uses
a different register layout, it is straightforward to support all three
variants with a single driver. Do this, and in the process remove the
GPIO-related definitions from the PMIC-specific headers, and therefore
the dependency on AXP_PMIC_BUS.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-17 23:41:14 -05:00
Samuel Holland
f6b9fbe0c2 gpio: axp/sunxi: Remove virtual VBUS enable GPIO
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove
it, along with the rest of the support for AXP virtual GPIOs.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-17 23:41:10 -05:00
Samuel Holland
75a15cd899 gpio: axp/sunxi: Remove virtual VBUS detection GPIO
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-17 23:41:09 -05:00
Samuel Holland
034ec99c5e sunxi: Enable support for SCP firmware on H3
Now that issues with the BROM have been sorted out, we can implement
PSCI system suspend on H3 by delegating to SCP firmware. Let's start by
including the firmware in the FIT image and starting the coprocessor if
valid firmware is loaded.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-17 23:41:00 -05:00
Samuel Holland
23f4c3ad21 sunxi: psci: Add support for H3 CPU 0 hotplug
Due to a bug in the H3 SoC, where the CPU 0 hotplug flag cannot be
written, resuming CPU 0 requires using the "Super Standby" code path in
the BROM instead of the hotplug path. This path requires jumping to an
eGON image in SRAM.

Add support to the build system to generate this eGON image and include
it in the FIT, and add code to direct the BROM to its location in SRAM.

Since the Super Standby code path in the BROM initializes the CPU and
AHB1 clocks to 24 MHz, those registers need to be restored after control
passes back to U-Boot. Furthermore, because the BROM lowers the AHB1
clock divider to /1 before switching to the lower-frequency parent,
PLL_PERIPH0 must be bypassed to prevent AHB1 from temporarily running at
600 MHz. Otherwise, this locks up the SoC.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-17 23:40:59 -05:00
Samuel Holland
20214cba3c tools: mkimage: Add Allwinner TOC1 support
TOC1 is an container format used by Allwinner's boot0 that can hold
multiple images. It supports encryption and signatures, but that
functionality is not implemented, only the basic "non-secure" subset.

A config file is used to provide the list of data files to include. Its
path is passed as the argument to "-d". It contains sections of the
following form:

  [name]
  file = /path/to/file
  addr = 0x12345678

Specific well-known names, such as "dtb", "opensbi", and "u-boot", are
used by the bootloader to distinguish the items inside the image.

Cover-letter:
tools: mkimage: Add Allwinner TOC1 support

The SPL port for the Allwinner D1 RISC-V SoC will probably take a while
longer than porting U-Boot proper, as none of the relevant drivers are
set up for DM in SPL. In the meantime, we are using[1][2] a fork[3] of
Allwinner's boot0 loader, which they also call "spl" in their BSP. boot0
uses this TOC1 image format.

The vendor tools for generating TOC1 images require a binary config file
generated by their FEX compiler. Instead of trying to support that, I
made up a simple human-readable config file format. I didn't see any
existing platform-agnostic parser for multi-image containers in mkimage.

I am sending this as RFC because it is only of temporary/limited use.
It only works with one specific fork of boot0 which was modified to
"behave" (the the original vendor version monkey-patches a custom header
inside the U-Boot image during boot). So it will be obsolete once U-Boot
SPL is ported. And it is Yet Another Image Format. On the other hand, it
does work, and it is currently being used.

[1]: https://linux-sunxi.org/Allwinner_Nezha#U-Boot
[2]: https://fedoraproject.org/wiki/Architectures/RISC-V/Allwinner
[3]: https://github.com/smaeul/sun20i_d1_spl
END
Series-prefix: RFC
Series-to: sunxi
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-17 23:40:30 -05:00
Samuel Holland
87f786c9d0 tools: mkimage: Add Allwinner TOC0 support
Most Allwinner sunxi SoCs have separate boot ROMs in non-secure and
secure mode. The "non-secure" or "normal" boot ROM (NBROM) uses the
existing sunxi_egon image type. The secure boot ROM (SBROM) uses a
completely different image type, known as TOC0.

A TOC0 image is composed of a header and two or more items. One item
is the firmware binary. The others form a chain linking the firmware
signature to the root-of-trust public key (ROTPK), which has its hash
burned in the SoC's eFuses. Signatures are made using RSA-2048 + SHA256.

The pseudo-ASN.1 structure is manually assembled; this is done to work
around bugs/quirks in the boot ROM, which vary between SoCs. This TOC0
implementation has been verified to work with the A50, A64, H5, H6,
and H616 SBROMs, and it may work with other SoCs.

Series-changes: 2
 - Moved certificate and key item structures out of sunxi_image.h
 - Renamed "main" and "item" variables for clarity
 - Improved error messages, and added a hint about key generation
 - Added a comment explaining the purpose of the various key files
 - Mentioned testing this code on A50 in the commit message

Series-changes: 3
 - Removed TOOLS_LIBCRYPTO selection for sunxi, since most boards
   do not need it
 - Added __packed to all new "ABI" structs
 - Added entry to MAINTAINERS for sunxi tools

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-03-17 23:27:59 -05:00
Tom Rini
e7fb67df31 Merge https://source.denx.de/u-boot/custodians/u-boot-mmc
- Rockchip, i.MX and xenon_sdhci updates
2022-03-16 08:13:16 -04:00
Tom Rini
469c1bc688 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- k210 updates
2022-03-16 08:11:53 -04:00
Alper Nebi Yasak
2a1d7c635f mmc: sdhci: Add HS400 Enhanced Strobe support
Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-16 18:10:19 +09:00
Haibo Chen
925f6900c8 mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON when necessary
After commit f132aab40327 ("Revert "mmc: fsl_esdhc_imx: use
VENDORSPEC_FRC_SDCLK_ON to control card clock output""), it
involve issue in mmc_switch_voltage(), because of the special
design of usdhc.

For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN,
these are reserved bits(Though RM contain the definition of these bits,
but actually internal IC logic do not implement, already confirm with
IC team). Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the card
clock output. Here is the definition of this bit in RM:

[8] FRC_SDCLK_ON
Force CLK output active
Do not set this bit to 1 unless it is necessary. Also, make sure that
this bit is cleared when uSDHC’s clock is about to be changed (frequency
change, clock source change, or delay chain tuning).
0b - CLK active or inactive is fully controlled by the hardware.
1b - Force CLK active

In default, the FRC_SDCLK_ON is 0. This means, when there is no command
or data transfer on bus, hardware will gate off the card clock. But in
some case, we need the card clock keep on. Take IO voltage 1.8v switch
as example, after IO voltage change to 1.8v, spec require gate off the
card clock for 5ms, and gate on the clock back, once detect the card
clock on, then the card will draw the dat0 to high immediately. If there
is not clock gate off/on behavior, some card will keep the dat0 to low
level. This is the reason we fail in mmc_switch_voltage().

To fix this issue, and concern that this is only the fsl usdhc hardware
design limitation, set the bit FRC_SDCLK_ON in the beginning of the
wait_dat0() and clear it in the end. To make sure the 1.8v IO voltage
switch process align with SD specification.

For standard tuning process, usdhc specification also require the card
clock keep on, so also add these behavior in fsl_esdhc_execute_tuning().

Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-03-16 16:40:56 +09:00
Damien Le Moal
fd426b3106 k210: use the board vendor name rather than the marketing name
"kendryte" is the marketing name for the K210 RISC-V SoC produced by
Canaan Inc. Rather than "kendryte,k210", use the usual "canaan,k210"
vendor,SoC compatibility string format in the device tree files and
use the SoC name for file names.
With these changes, the device tree files are more in sync with the
Linux kernel DTS and drivers, making uboot device tree usable by the
kernel.

Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-03-15 17:43:11 +08:00
Tom Rini
f43e892f51 - fix display of the u-boot logo on Apple devices
- convert Nokia RX-51 to CONFIG_DM_VIDEO
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Merge tag 'video-20220314' of https://source.denx.de/u-boot/custodians/u-boot-video

 - fix display of the u-boot logo on Apple devices
 - convert Nokia RX-51 to CONFIG_DM_VIDEO
2022-03-14 18:39:26 -04:00
Heinrich Schuchardt
66028930da efi_loader: copy GUID in InstallProtocolInterface()
InstallProtocolInterface() is called with a pointer to the protocol GUID.
There is not guarantee that the memory used by the caller for the protocol
GUID stays allocated. To play it safe the GUID should be copied to U-Boot's
internal structures.

Reported-by: Joerie de Gram <j.de.gram@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-03-12 12:27:07 +01:00
Pali Rohár
d6213e206c Nokia RX-51: Convert to CONFIG_DM_VIDEO
Mechanically convert video_hw_init() function to UCLASS_VIDEO probe
callback and replace CONFIG_CFB_CONSOLE by CONFIG_DM_VIDEO.

As framebuffer base address is setup by the bootloader which loads U-Boot,
set plat->base to that fixed framebuffer address.

This change was tested in qemu n900 machine and is working fine.

What does not work is CONFIG_VIDEO_LOGO, seems to be buggy.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-03-09 21:28:53 +01:00
Romain Naour
4ff9a8c33c configs: ti: use standard configuration nodes naming
Currently, any u-boot bootloader for ti armv7 platforms using
DEFAULT_FIT_TI_ARGS to boot with a fitimage (boot_fit = 1)
doesn't boot when built with Yocto Poky (openembedded-core).

  ## Loading kernel from FIT Image at 90000000 ...
  Could not find configuration node
  ERROR: can't get kernel image!

Arago forked the kernel-fitimage class [1] and altered the
configuration nodes naming while adding the OPTEE support by
using FITIMAGE_CONF_BY_NAME by default [2].

The "upstream" kernel-fitimage class from openembedded-core still
add the "conf-" prefix for each configuration nodes [3].

The ITS file format (from doc/uImage.FIT/source_file_format.txt)
is not really accurate with the expected naming of these nodes.
But in practice the "conf-" prefix is widely used.

When the FIT image support has been added for ti armv7 platforms
the naming from Arago has been used [3]. Fix this issue by adding
the prefix expected by the ITS file generated by kernel-fitimage
class from openembedded-core.

[1] http://arago-project.org/git/meta-arago.git?p=meta-arago.git;a=commitdiff;h=719ab1b2098bcdc59c249e3529fa82cb1b9130e6
[2] http://arago-project.org/git/meta-arago.git?p=meta-arago.git;a=commitdiff;h=f23f2876a0cda89241d031bb7ba0b4256ed90035
[3] https://git.openembedded.org/openembedded-core/tree/meta/classes/kernel-fitimage.bbclass?h=yocto-3.1.13#n290
[3] 1e93cc8473e4fe018aececc8ed3bf8fc2b3ff561

Signed-off-by: Romain Naour <romain.naour@smile.fr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Denys Dmytriyenko <denys@konsulko.com>
2022-03-04 15:20:06 -05:00
Tom Rini
705b5840cd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Update and fixes for sl28, lx2, pblimage generation for some powerpc
products
2022-03-03 08:24:13 -05:00
Janne Grunau
6fb4f7387e arm: apple: Switch to fully dynamic mem layout
Support for Apple M1 Pro and Max will allow using a single binary for
all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM
start address is 0x100_0000_0000 instead of 0x8_0000_0000.
Replace the hardcoded memory layout with dynamic initialized
environment variables in board_late_init().

Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021).

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-28 10:33:45 -05:00
Daniel Klauer
453db60568 lx2160a: Fix distroboot device list for configs without USB/SCSI/etc
The BOOT_TARGET_DEVICES list for distro_bootcmd was hard-coded to assume
that all boot devices are available/enabled in the configuration,
thus ignoring the actual config settings. The config_distro_bootcmd.h
header file specifically has compile-time checks to detect such problems.

To allow disabling USB, SCSI, etc. in custom lx2160a board configs,
make it depend on the config settings and use only the enabled features.

Signed-off-by: Daniel Klauer <daniel.klauer@gin.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28 12:01:02 +05:30
Michael Walle
d36b683a0f board: sl28: print CPLD version on bootup
Most of the time it is very useful to have the version of the board
management controller. Now that we have a driver, print it during
startup.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28 11:59:35 +05:30
Michael Walle
42595eb706 misc: add sl28cpld base driver
Add a multi-function device driver which will probe its children and
provides methods to access the device.

Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28 11:59:35 +05:30
Sean Anderson
e96e2132f9 clk: Add clk_get_by_name_optional
This adds a helper function for clk_get_by_name in cases where the clock is
optional. Hopefully this helps point driver writers in the right direction.
Also convert some existing users.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20220115205247.566210-2-seanga2@gmail.com
2022-02-25 01:41:04 -05:00
Sean Anderson
a0abea867a clk: Add driver API to HTML docs
This converts the existing driver API docs (clk-uclass.h) to kernel doc
format and adds them to the HTML documentation. Because the kernel doc
sphinx converter does not handle functions in structs very well, the
individual methods are documented separately. This is primarily inspired by
the phylink documentation [1], which uses this trick extensively.

[1] https://www.kernel.org/doc/html/latest/networking/kapi.html#c.phylink_mac_ops

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20211222171114.3091780-5-seanga2@gmail.com
2022-02-25 01:41:04 -05:00
Sean Anderson
9c88b13a90 clk: Add client API to HTML docs
This converts the existing client (aka clk.h) documentation to kernel doc
format, and adds it to the HTML docs. I have tried to preserve existing
comments as much as possible, refraining from semantic changes.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20211222171114.3091780-4-seanga2@gmail.com
[rebased onto u-boot/master and resolved conflicts]
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2022-02-25 01:41:04 -05:00
Sean Anderson
14cacb019c clk: Inline clk_get_*_optional
The optional varients of clk_get_* functions are just simple wrappers.
Reduce code size a bit by inlining them. On platforms where it is not used
(most of them), it will not be compiled in any more. On platforms where
they are used, the inlined branch should not cause any significant growth.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20211222171114.3091780-3-seanga2@gmail.com
2022-02-24 23:58:13 -05:00
Sean Anderson
011bbfbb30 clk: Rename clk_get_optional_nodev
This normalizes the name of this accessor function to put "_optional" last.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20211222171114.3091780-2-seanga2@gmail.com
2022-02-24 23:58:13 -05:00
Simon Glass
00959d871c spl: x86: Correct the binman symbols for SPL
These symbols are incorrect, meaning that binman cannot find the
associated entry. This leads to errors like:

binman: Section '/binman/simple-bin': Symbol '_binman_spl_prop_size'
   in entry '/binman/simple-bin/u-boot-spl/u-boot-spl-nodtb':
   Entry 'spl' not found in list (mkimage,u-boot-spl-nodtb,
   u-boot-spl-bss-pad,u-boot-spl-dtb,u-boot-spl,u-boot-img,main-section)

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-22 10:05:44 -07:00
Tom Rini
24b628a8f8 Xilinx changes for v2022.04-rc3
microblaze:
 - Fix exception handler
 
 zynqmp:
 - Show information about secure images
 - DT changes (som u-boot file removal)
 - Fix zynqmp_pm_cfg_obj_convert.py
 - Fix platform boot
 
 xilinx:
 - Fix bootm_size calculation
 - Remove GPIO_EXTRA_HEADER selection
 
 power:
 - Add zynqmp power management driver
 
 scsi:
 - Add phy support to ceva driver
 
 zynq qspi:
 - Fix unaligned accesses and check baudrate setup
 - Add support for spi memory operations
 
 net:
 - Fix 64bit calculation in axi_emac
 
 video:
 - Add missing gpio dependency for seps driver
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Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc3

microblaze:
- Fix exception handler

zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot

xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection

power:
- Add zynqmp power management driver

scsi:
- Add phy support to ceva driver

zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations

net:
- Fix 64bit calculation in axi_emac

video:
- Add missing gpio dependency for seps driver
2022-02-21 08:32:02 -05:00
Heiko Thiery
891a32465d kontron-sl-mx8mm: change environment address variables
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enought space to load kernel images bigger than 32MB change the
variables to a feasible value.

The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".

The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-02-19 23:32:23 +01:00
Francesco Dolcini
a1128944a1 colibri-imx6ull: improve env badblock management
Use the complete 512kb (4 blocks) nand partition reserved for u-boot
environment instead of just the first block, this allows the module to
have a working environment even if 3 blocks are bad.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-02-19 23:32:22 +01:00
Tim Harvey
10673ebb1f board: gateworks: venice: config file cleanups
Clean up config file:
 - remove unnecessary IMX_FEC_BASE
 - remove unnecessary comment
 - remove ipaddr/serverip from env

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-19 14:46:54 +01:00
Tim Harvey
2cb156e126 board: gateworks: venice: add imx8mn-gw7902 support
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
 - LPDDR4 DRAM
 - eMMC FLASH
 - Gateworks System Controller
 - LTE CAT M1 modem
 - USB 2.0 HUB
 - M.2 Socket with USB2.0, PCIe, and dual-SIM
 - IMX8M FEC
 - PCIe based GbE
 - RS232/RS485/RS422 serial transceiver
 - GPS
 - CAN bus
 - WiFi / Bluetooth
 - MIPI header (DSI/CSI/GPIO/PWM/I2S)
 - PMIC

To add support for the i.MX8M Nano GW7902:
 - Add imx8mn-venice dts/defconfig/include
 - Add imx8mn-gw7902 dts
 - Add imx8mn-2gb lpddr4 dram configs
 - Add misc support for IMX8M Nano SoC
 - rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
 - update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-19 14:46:54 +01:00
Ying-Chun Liu (PaulLiu)
ddb56f371a arm: imx8m: add support for Advantech RSB-3720
Add initial support for Advantech RSB-3720 board.
The initial support includes:
 - MMC
 - eMMC
 - I2C
 - FEC
 - Serial console

Signed-off-by: Darren Huang <darren.huang@advantech.com.tw>
Signed-off-by: Kevin12.Chen <Kevin12.Chen@advantech.com.tw>
Signed-off-by: Phill.Liu <Phill.Liu@advantech.com.tw>
Signed-off-by: Tim Liang <tim.liang@advantech.com.tw>
Signed-off-by: wei.zeng <wei.zeng@advantech.com.cn>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
Cc: Peng Fan (OSS) <peng.fan@oss.nxp.com>
2022-02-19 14:46:54 +01:00
Tom Rini
8ad1c9c26f Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- a37xx: pci: Cleanup and minor fix for root port check (Pali)
- pci: mvebu: Ensure that root port is always on root zero bus (Pali)
- kwbimage: Fix dumping DATA registers for v0 images (Pali)
- kwbimage: Support for parsing extended v0 format (Pali)
- a37xx: Fix code and update DTS files to upstream version (Pali)
- a37xx: Fix and extend building memory map (Pali)
- ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT decision (Marek)
- mvebu: Optionally reset board on DDR training failure (Marek)
2022-02-17 11:03:50 -05:00
Pali Rohár
0934dddc64 arm: a37xx: Update DTS files to version from upstream Linux kernel
This change updates all Armada 37xx DTS files to version which is used by
Linux kernel v5.18.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
819a43c90a arm: a37xx: pci: Use standard register macros from pci.h
PCI config space of the aardvark PCIe Root Port is available only in
internal aardvark memory space starting at offset 0x0. PCI Express
registers (PCI_EXP_*) start at offset 0xc0. And Advanced Error Reporting
registers (PCI_ERR_*) start at offset 0x100.

Replace custom aardvark register macros by standard PCI macros from
include/pci.h file with fixed offset.

Some DEVCTL and AER macros are not defined in include/pci.h file, so define
them in the same way as in linux uapi header file pci_regs.h.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Sinthu Raja
0ca9f70423 include: configs: Update env for selecting right dtb
Now that single defconfig can be used for booting J721E EVM and
SK, default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Tom Rini
545026a554 fdtdec.h: Remove gurads around fdtdec_resetup function
This function has not been conditionally compiled for some time, so
remove the incorrect guards around the declaration.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-16 14:19:29 -05:00
Ovidiu Panait
1669b3d1a0 microblaze: exception: migrate MICROBLAZE_V5 to Kconfig
Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only
covers delay slot exception support.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 13:11:43 +01:00
Michal Simek
fac46bc446 arm64: zynqmp: Add command for disabling loading other overlays
Add command "zynqmp pmufw node close" to disable permission to load
additional pmufw config overlays. This command will make sure that any
other sw will ask for changing permission.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/cfa5cc7909eb8deb23eb0f11c26954cbaddeb861.1642163135.git.michal.simek@xilinx.com
2022-02-15 13:04:03 +01:00
Michal Simek
c750c6dbb2 xilinx: firmware: Introduce zynqmp_pmufw_node() for loading PMU fragments
Introduce zynqmp_pmufw_node() for loading PMU configuration fragment for
enabling IPs. Firmware driver has small overlay where NODE id is added and
config fragment is sent to PMUFW. There is a need to build PMUFW with
fragment support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/636e8150bd4e2b1f988d59795772c685ceeec083.1642163135.git.michal.simek@xilinx.com
2022-02-15 13:03:54 +01:00