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https://github.com/smaeul/u-boot.git
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No commits in common. "d1-2022-10-31" and "allwinner" have entirely different histories.
d1-2022-10
...
allwinner
@ -1143,6 +1143,7 @@ config ARCH_SUNXI
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select SPL_SYS_THUMB_BUILD if !ARM64
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select SYS_THUMB_BUILD if !ARM64
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select SPL_USE_TINY_PRINTF
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imply SPL_LOAD_FIT
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config ARCH_U8500
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bool "ST-Ericsson U8500 Series"
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@ -9,9 +9,7 @@
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#define _SUNXI_GPIO_H
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#include <linux/types.h>
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#if 0
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#include <asm/arch/cpu.h>
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#endif
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/*
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* sunxi has 9 banks of gpio, they are:
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@ -57,36 +55,30 @@
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struct sunxi_gpio {
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u32 cfg[4];
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u32 dat;
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u32 drv[4];
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u32 drv[2];
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u32 pull[2];
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u32 reserved;
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};
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/* gpio interrupt control */
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struct sunxi_gpio_int {
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u32 cfg[4];
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u32 cfg[3];
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u32 ctl;
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u32 sta;
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u32 deb; /* interrupt debounce */
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u32 reserved;
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};
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#if 0
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struct sunxi_gpio_reg {
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struct sunxi_gpio gpio_bank[SUNXI_GPIO_BANKS];
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u8 res[0xbc];
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struct sunxi_gpio_int gpio_int;
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};
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#endif
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#define SUN50I_H6_GPIO_POW_MOD_SEL 0x340
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#define SUN50I_H6_GPIO_POW_MOD_VAL 0x348
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#if 0
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#define BANK_TO_GPIO(bank) (((bank) < SUNXI_GPIO_L) ? \
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&((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank] : \
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&((struct sunxi_gpio_reg *)SUNXI_R_PIO_BASE)->gpio_bank[(bank) - SUNXI_GPIO_L])
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#endif
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#define GPIO_BANK(pin) ((pin) >> 5)
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#define GPIO_NUM(pin) ((pin) & 0x1f)
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@ -7,7 +7,7 @@
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#include <common.h>
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#include <asm/io.h>
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//#include <asm/arch/gpio.h>
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#include <asm/arch/gpio.h>
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void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val)
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{
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@ -17,7 +17,6 @@ void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val)
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clrsetbits_le32(&pio->cfg[index], 0xf << offset, val << offset);
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}
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#if !CONFIG_IS_ENABLED(DM_GPIO)
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void sunxi_gpio_set_cfgpin(u32 pin, u32 val)
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{
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u32 bank = GPIO_BANK(pin);
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@ -25,7 +24,6 @@ void sunxi_gpio_set_cfgpin(u32 pin, u32 val)
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sunxi_gpio_set_cfgbank(pio, pin, val);
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}
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#endif
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int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset)
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{
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@ -39,7 +37,6 @@ int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset)
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return cfg & 0xf;
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}
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#if !CONFIG_IS_ENABLED(DM_GPIO)
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int sunxi_gpio_get_cfgpin(u32 pin)
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{
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u32 bank = GPIO_BANK(pin);
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@ -55,7 +52,6 @@ void sunxi_gpio_set_drv(u32 pin, u32 val)
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sunxi_gpio_set_drv_bank(pio, pin, val);
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}
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#endif
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void sunxi_gpio_set_drv_bank(struct sunxi_gpio *pio, u32 bank_offset, u32 val)
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{
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@ -65,7 +61,6 @@ void sunxi_gpio_set_drv_bank(struct sunxi_gpio *pio, u32 bank_offset, u32 val)
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clrsetbits_le32(&pio->drv[index], 0x3 << offset, val << offset);
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}
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#if !CONFIG_IS_ENABLED(DM_GPIO)
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void sunxi_gpio_set_pull(u32 pin, u32 val)
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{
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u32 bank = GPIO_BANK(pin);
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@ -73,7 +68,6 @@ void sunxi_gpio_set_pull(u32 pin, u32 val)
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sunxi_gpio_set_pull_bank(pio, pin, val);
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}
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#endif
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void sunxi_gpio_set_pull_bank(struct sunxi_gpio *pio, int bank_offset, u32 val)
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{
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@ -14,9 +14,6 @@ config TARGET_AX25_AE350
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config TARGET_MICROCHIP_ICICLE
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bool "Support Microchip PolarFire-SoC Icicle Board"
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config TARGET_OPENPITON_RISCV64
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bool "Support RISC-V cores on OpenPiton SoC"
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config TARGET_QEMU_VIRT
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bool "Support QEMU Virt Board"
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@ -31,10 +28,8 @@ config TARGET_SIPEED_MAIX
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bool "Support Sipeed Maix Board"
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select SYS_CACHE_SHIFT_6
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config TARGET_SUN20I_D1
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bool "Support Allwinner D1 Boards"
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select BOARD_SUNXI
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select SYS_CACHE_SHIFT_6
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config TARGET_OPENPITON_RISCV64
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bool "Support RISC-V cores on OpenPiton SoC"
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endchoice
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@ -66,9 +61,9 @@ config SPL_SYS_DCACHE_OFF
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source "board/AndesTech/ax25-ae350/Kconfig"
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source "board/emulation/qemu-riscv/Kconfig"
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source "board/microchip/mpfs_icicle/Kconfig"
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source "board/openpiton/riscv64/Kconfig"
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source "board/sifive/unleashed/Kconfig"
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source "board/sifive/unmatched/Kconfig"
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source "board/openpiton/riscv64/Kconfig"
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source "board/sipeed/maix/Kconfig"
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# platform-specific options below
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@ -5,4 +5,3 @@
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extra-y = start.o
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obj-y += cpu.o mtrap.o
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obj-y += thead/cache.o
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@ -1,119 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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#include <asm/cache.h>
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#include <asm/csr.h>
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#define CSR_MHCR 0x7c1
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#define CSR_MCOR 0x7c2
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#define CSR_MHINT 0x7c5
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#define MHCR_IE BIT(0) /* icache enable */
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#define MHCR_DE BIT(1) /* dcache enable */
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#define MHCR_WA BIT(2) /* dcache write allocate */
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#define MHCR_WB BIT(3) /* dcache write back */
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#define MHCR_RS BIT(4) /* return stack enable */
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#define MHCR_BPE BIT(5) /* branch prediction enable */
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#define MHCR_BTB BIT(6) /* branch target prediction enable */
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#define MHCR_WBR BIT(8) /* write burst enable */
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#define MHCR_L0BTB BIT(12)
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#define MCOR_CACHE_SEL_ICACHE (0x1 << 0)
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#define MCOR_CACHE_SEL_DCACHE (0x2 << 0)
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#define MCOR_CACHE_SEL_BOTH (0x3 << 0)
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#define MCOR_INV BIT(4)
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#define MCOR_CLR BIT(5)
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#define MCOR_BHT_INV BIT(16)
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#define MCOR_BTB_INV BIT(17)
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#define MHINT_DPLD BIT(2) /* dcache prefetch enable */
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#define MHINT_AMR_PAGE (0x0 << 3)
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#define MHINT_AMR_LIMIT_3 (0x1 << 3)
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#define MHINT_AMR_LIMIT_64 (0x2 << 3)
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#define MHINT_AMR_LIMIT_128 (0x3 << 3)
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#define MHINT_IPLD BIT(8) /* icache prefetch enable */
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#define MHINT_IWPE BIT(9) /* icache prediction enable */
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#define MHINT_DIS_PREFETCH_2 (0x0 << 13)
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#define MHINT_DIS_PREFETCH_4 (0x1 << 13)
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#define MHINT_DIS_PREFETCH_8 (0x2 << 13)
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#define MHINT_DIS_PREFETCH_16 (0x3 << 13)
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#define sync_i() asm volatile (".long 0x01a0000b" ::: "memory")
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void flush_dcache_all(void)
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{
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asm volatile (".long 0x0030000b" ::: "memory"); /* dcache.ciall */
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sync_i();
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}
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void flush_dcache_range(unsigned long start, unsigned long end)
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{
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register unsigned long i asm("a0") = start & -CONFIG_SYS_CACHELINE_SIZE;
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for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
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asm volatile (".long 0x02b5000b" ::: "memory"); /* dcache.cipa a0 */
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sync_i();
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}
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void invalidate_icache_range(unsigned long start, unsigned long end)
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{
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register unsigned long i asm("a0") = start & -CONFIG_SYS_CACHELINE_SIZE;
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for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
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asm volatile (".long 0x0385000b" ::: "memory"); /* icache.ipa a0 */
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sync_i();
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}
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void invalidate_dcache_range(unsigned long start, unsigned long end)
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{
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register unsigned long i asm("a0") = start & -CONFIG_SYS_CACHELINE_SIZE;
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for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
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asm volatile (".long 0x02a5000b" ::: "memory"); /* dcache.ipa a0 */
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sync_i();
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}
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#if 0
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void icache_enable(void)
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{
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asm volatile (".long 0x0100000b" ::: "memory"); /* icache.iall */
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sync_i();
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csr_set(CSR_MHCR, MHCR_IE | MHCR_RS | MHCR_BPE | MHCR_BTB | MHCR_L0BTB);
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csr_set(CSR_MHINT, MHINT_IPLD | MHINT_IWPE);
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}
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void icache_disable(void)
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{
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csr_clear(CSR_MHCR, MHCR_IE);
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}
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int icache_status(void)
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{
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return csr_read(CSR_MHCR) & MHCR_IE;
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}
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void dcache_enable(void)
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{
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asm volatile (".long 0x0020000b" ::: "memory"); /* dcache.iall */
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sync_i();
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csr_set(CSR_MHCR, MHCR_DE | MHCR_WA | MHCR_WB | MHCR_WBR);
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csr_set(CSR_MHINT, MHINT_DPLD | MHINT_AMR_LIMIT_3);
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}
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void dcache_disable(void)
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{
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asm volatile (".long 0x0010000b" ::: "memory"); /* dcache.call */
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sync_i();
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csr_clear(CSR_MHCR, MHCR_DE);
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}
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int dcache_status(void)
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{
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return csr_read(CSR_MHCR) & MHCR_DE;
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}
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void enable_caches(void)
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{
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icache_enable();
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dcache_enable();
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}
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#endif
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@ -7,15 +7,6 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
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dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
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dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-clockworkpi-v3.14.dtb
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dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-devterm-v3.14.dtb
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dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-dongshan-nezha-stu.dtb
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dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-lichee-rv-86-panel-480p.dtb
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dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-lichee-rv-86-panel-720p.dtb
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dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-lichee-rv-dock.dtb
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dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-lichee-rv.dtb
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dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-mangopi-mq-pro.dtb
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dtb-$(CONFIG_TARGET_SUN20I_D1) += sun20i-d1-nezha.dtb
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include $(srctree)/scripts/Makefile.dts
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@ -1,368 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ or MIT)
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// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "sun20i-d1.dtsi"
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#include "sun20i-d1-common-regulators.dtsi"
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/ {
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model = "ClockworkPi v3.14 (R-01)";
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compatible = "clockwork,r-01-clockworkpi-v3.14", "allwinner,sun20i-d1";
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aliases {
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ethernet0 = &ap6256;
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mmc0 = &mmc0;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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audio_amplifier: audio-amplifier {
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compatible = "simple-audio-amplifier";
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enable-gpios = <&pio 4 1 GPIO_ACTIVE_HIGH>; /* PE1/GPIO11 */
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sound-name-prefix = "Amplifier";
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VCC-supply = <®_vcc>;
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};
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/*
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* FIXME: This is not really an amplifier, but the amplifier binding
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* has the needed properties and behavior.
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*/
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audio_switch: audio-switch {
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compatible = "simple-audio-amplifier";
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enable-gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2/AUD_SWITCH */
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sound-name-prefix = "Switch";
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VCC-supply = <®_aldo1>;
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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power-supply = <®_vcc>;
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pwms = <&pwm 4 50000 0>; /* PD20/GPIO9 */
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};
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bt_sco_codec: bt-sco-codec {
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#sound-dai-cells = <0>;
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compatible = "linux,bt-sco";
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};
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bt-sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "Bluetooth";
|
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#address-cells = <1>;
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#size-cells = <0>;
|
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|
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simple-audio-card,dai-link@0 {
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format = "dsp_a";
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frame-master = <&bt_sound_cpu>;
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bitclock-master = <&bt_sound_cpu>;
|
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|
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bt_sound_cpu: cpu {
|
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sound-dai = <&i2s1>;
|
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};
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|
||||
codec {
|
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sound-dai = <&bt_sco_codec>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_connector: connector {
|
||||
compatible = "hdmi-connector";
|
||||
type = "d";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out_connector>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* This regulator is PWM-controlled, but the PWM controller is not
|
||||
* yet supported, so fix the regulator to its default voltage.
|
||||
*/
|
||||
reg_vdd_cpu: vdd-cpu {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm 0 50000 0>;
|
||||
pwm-supply = <®_vcc>;
|
||||
regulator-name = "vdd-cpu";
|
||||
regulator-min-microvolt = <810000>;
|
||||
regulator-max-microvolt = <1160000>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 6 11 GPIO_ACTIVE_LOW>; /* PG11/GPIO3 */
|
||||
};
|
||||
};
|
||||
|
||||
&codec {
|
||||
aux-devs = <&audio_amplifier>, <&audio_switch>;
|
||||
hp-det-gpio = <&pio 1 12 GPIO_ACTIVE_HIGH>; /* PB12/GPIO10 */
|
||||
pin-switches = "Internal Speakers";
|
||||
routing = "Internal Speakers", "Amplifier OUTL",
|
||||
"Internal Speakers", "Amplifier OUTR",
|
||||
"Amplifier INL", "Switch OUTL",
|
||||
"Amplifier INR", "Switch OUTR",
|
||||
"Headphone Jack", "Switch OUTL",
|
||||
"Headphone Jack", "Switch OUTR",
|
||||
"Switch INL", "HPOUTL",
|
||||
"Switch INR", "HPOUTR",
|
||||
"MICIN3", "Headset Microphone",
|
||||
"Headset Microphone", "HBIAS";
|
||||
widgets = "Microphone", "Headset Microphone",
|
||||
"Headphone", "Headphone Jack",
|
||||
"Speaker", "Internal Speakers";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <®_vdd_cpu>;
|
||||
};
|
||||
|
||||
&de {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_out {
|
||||
hdmi_out_connector: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0_pb10_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
axp221: pmic@34 {
|
||||
compatible = "x-powers,axp228", "x-powers,axp221";
|
||||
reg = <0x34>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <4 9 IRQ_TYPE_LEVEL_LOW>; /* PE9/GPIO2 */
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
ac_power_supply: ac-power {
|
||||
compatible = "x-powers,axp221-ac-power-supply";
|
||||
};
|
||||
|
||||
axp_adc: adc {
|
||||
compatible = "x-powers,axp221-adc";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
|
||||
battery_power_supply: battery-power {
|
||||
compatible = "x-powers,axp221-battery-power-supply";
|
||||
};
|
||||
|
||||
regulators {
|
||||
x-powers,dcdc-freq = <3000>;
|
||||
|
||||
reg_dcdc1: dcdc1 {
|
||||
regulator-name = "sys-3v3";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_dcdc3: dcdc3 {
|
||||
regulator-name = "sys-1v8";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
reg_aldo1: aldo1 {
|
||||
regulator-name = "aud-3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_aldo2: aldo2 {
|
||||
regulator-name = "disp-3v3";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_aldo3: aldo3 {
|
||||
regulator-name = "vdd-wifi";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
/* DLDO1 and ELDO1-3 are connected in parallel. */
|
||||
reg_dldo1: dldo1 {
|
||||
regulator-name = "vbat-wifi-a";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
/* DLDO2-DLDO4 are connected in parallel. */
|
||||
reg_dldo2: dldo2 {
|
||||
regulator-name = "vcc-3v3-ext-a";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_dldo3: dldo3 {
|
||||
regulator-name = "vcc-3v3-ext-b";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_dldo4: dldo4 {
|
||||
regulator-name = "vcc-3v3-ext-c";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_eldo1: eldo1 {
|
||||
regulator-name = "vbat-wifi-b";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_eldo2: eldo2 {
|
||||
regulator-name = "vbat-wifi-c";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_eldo3: eldo3 {
|
||||
regulator-name = "vbat-wifi-d";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb_power_supply: usb-power {
|
||||
compatible = "x-powers,axp221-usb-power-supply";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2s1 {
|
||||
pinctrl-0 = <&i2s1_clk_pins>, <&i2s1_din_pin>, <&i2s1_dout_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
broken-cd;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
vmmc-supply = <®_dcdc1>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
bus-width = <4>;
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_dldo1>;
|
||||
vqmmc-supply = <®_aldo3>;
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
ap6256: wifi@1 {
|
||||
compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac";
|
||||
reg = <1>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10/GPIO4 */
|
||||
interrupt-names = "host-wake";
|
||||
};
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
vcc-pg-supply = <®_ldoa>;
|
||||
|
||||
i2s1_clk_pins: i2s1-clk-pins {
|
||||
pins = "PG12", "PG13";
|
||||
function = "i2s1";
|
||||
};
|
||||
|
||||
i2s1_din_pin: i2s1-din-pin {
|
||||
pins = "PG14";
|
||||
function = "i2s1_din";
|
||||
};
|
||||
|
||||
i2s1_dout_pin: i2s1-dout-pin {
|
||||
pins = "PG15";
|
||||
function = "i2s1_dout";
|
||||
};
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-0 = <&pwm0_pd16_pin>, <&pwm4_pd20_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_pb8_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
uart-has-rtscts;
|
||||
pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm4345c5";
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <6 17 IRQ_TYPE_LEVEL_HIGH>; /* PG17/GPIO6 */
|
||||
device-wakeup-gpios = <&pio 6 16 GPIO_ACTIVE_HIGH>; /* PG16/GPIO7 */
|
||||
shutdown-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18/GPIO5 */
|
||||
max-speed = <1500000>;
|
||||
vbat-supply = <®_dldo1>;
|
||||
vddio-supply = <®_aldo3>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
usb0_vbus_power-supply = <&ac_power_supply>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,64 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
/ {
|
||||
reg_vcc: vcc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc-3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <®_vcc>;
|
||||
};
|
||||
};
|
||||
|
||||
&codec {
|
||||
avcc-supply = <®_aldo>;
|
||||
hpvcc-supply = <®_hpldo>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
hvcc-supply = <®_ldoa>;
|
||||
};
|
||||
|
||||
&lradc {
|
||||
vref-supply = <®_aldo>;
|
||||
};
|
||||
|
||||
&pio {
|
||||
vcc-pb-supply = <®_vcc_3v3>;
|
||||
vcc-pc-supply = <®_vcc_3v3>;
|
||||
vcc-pd-supply = <®_vcc_3v3>;
|
||||
vcc-pe-supply = <®_vcc_3v3>;
|
||||
vcc-pf-supply = <®_vcc_3v3>;
|
||||
vcc-pg-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
®_aldo {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vdd33-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
®_hpldo {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
hpldoin-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
®_ldoa {
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
ldo-in-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
&ths {
|
||||
vref-supply = <®_aldo>;
|
||||
};
|
||||
@ -1,53 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "sun20i-d1-clockworkpi-v3.14.dts"
|
||||
|
||||
/ {
|
||||
model = "Clockwork DevTerm (R-01)";
|
||||
compatible = "clockwork,r-01-devterm-v3.14",
|
||||
"clockwork,r-01-clockworkpi-v3.14",
|
||||
"allwinner,sun20i-d1";
|
||||
|
||||
fan {
|
||||
compatible = "gpio-fan";
|
||||
gpios = <&pio 3 10 GPIO_ACTIVE_HIGH>; /* PD10/GPIO41 */
|
||||
gpio-fan,speed-map = <0 0>,
|
||||
<6000 1>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
i2c-gpio-0 {
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&pio 3 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD14/GPIO44 */
|
||||
scl-gpios = <&pio 3 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD15/GPIO45 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@54 {
|
||||
compatible = "ti,adc101c";
|
||||
reg = <0x54>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <4 12 IRQ_TYPE_LEVEL_LOW>; /* PE12/GPIO35 */
|
||||
vref-supply = <®_dldo2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi {
|
||||
pinctrl-0 = <&dsi_4lane_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
panel@0 {
|
||||
compatible = "clockwork,cwd686";
|
||||
reg = <0>;
|
||||
backlight = <&backlight>;
|
||||
reset-gpios = <&pio 3 19 GPIO_ACTIVE_LOW>; /* PD19/GPIO8 */
|
||||
rotation = <90>;
|
||||
iovcc-supply = <®_dcdc3>;
|
||||
vci-supply = <®_aldo2>;
|
||||
};
|
||||
};
|
||||
@ -1,146 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
#include "sun20i-d1.dtsi"
|
||||
#include "sun20i-d1-common-regulators.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Dongshan Nezha STU";
|
||||
compatible = "100ask,dongshan-nezha-stu", "allwinner,sun20i-d1";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &emac;
|
||||
mmc0 = &mmc0;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
hdmi_connector: connector {
|
||||
compatible = "hdmi-connector";
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out_connector>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-0 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */
|
||||
};
|
||||
};
|
||||
|
||||
reg_usbvbus: usbvbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usbvbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
|
||||
enable-active-high;
|
||||
vin-supply = <®_vcc>;
|
||||
};
|
||||
|
||||
reg_vdd_cpu: vdd-cpu {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm 0 50000 0>;
|
||||
pwm-supply = <®_vcc>;
|
||||
regulator-name = "vdd-cpu";
|
||||
regulator-min-microvolt = <810000>;
|
||||
regulator-max-microvolt = <1160000>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <®_vdd_cpu>;
|
||||
};
|
||||
|
||||
&de {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&emac {
|
||||
pinctrl-0 = <&rgmii_pe_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-supply = <®_vcc_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_out {
|
||||
hdmi_out_connector: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
broken-cd;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
vmmc-supply = <®_vcc_3v3>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-0 = <&pwm0_pd16_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_pb8_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
dr_mode = "otg";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
|
||||
usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
|
||||
usb0_vbus-supply = <®_usbvbus>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,80 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
#include "sun20i-d1-lichee-rv-86-panel.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Sipeed Lichee RV 86 Panel (480p)";
|
||||
compatible = "sipeed,lichee-rv-86-panel-480p", "sipeed,lichee-rv",
|
||||
"allwinner,sun20i-d1";
|
||||
|
||||
backlight: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
power-supply = <®_vcc>;
|
||||
pwms = <&pwm 7 50000 0>;
|
||||
};
|
||||
|
||||
spi {
|
||||
compatible = "spi-gpio";
|
||||
cs-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */
|
||||
mosi-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */
|
||||
sck-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
|
||||
num-chipselects = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "sitronix,st7701s";
|
||||
reg = <0>;
|
||||
backlight = <&backlight>;
|
||||
reset-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; /* PG13 */
|
||||
spi-3wire;
|
||||
|
||||
port {
|
||||
panel_in_tcon_lcd0: endpoint {
|
||||
remote-endpoint = <&tcon_lcd0_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&de {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-0 = <&i2c2_pb0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
touchscreen@48 {
|
||||
compatible = "focaltech,ft6236";
|
||||
reg = <0x48>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <6 14 IRQ_TYPE_LEVEL_LOW>; /* PG14 */
|
||||
iovcc-supply = <®_vcc_3v3>;
|
||||
reset-gpios = <&pio 6 15 GPIO_ACTIVE_LOW>; /* PG15 */
|
||||
touchscreen-size-x = <480>;
|
||||
touchscreen-size-y = <480>;
|
||||
vcc-supply = <®_vcc_3v3>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-0 = <&pwm7_pd22_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tcon_lcd0 {
|
||||
pinctrl-0 = <&lcd_rgb666_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&tcon_lcd0_out {
|
||||
tcon_lcd0_out_panel: endpoint {
|
||||
remote-endpoint = <&panel_in_tcon_lcd0>;
|
||||
};
|
||||
};
|
||||
@ -1,10 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
#include "sun20i-d1-lichee-rv-86-panel.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Sipeed Lichee RV 86 Panel (720p)";
|
||||
compatible = "sipeed,lichee-rv-86-panel-720p", "sipeed,lichee-rv",
|
||||
"allwinner,sun20i-d1";
|
||||
};
|
||||
@ -1,156 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
#include "sun20i-d1-lichee-rv.dts"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
ethernet0 = &emac;
|
||||
ethernet1 = &xr829;
|
||||
};
|
||||
|
||||
audio_amplifier: audio-amplifier {
|
||||
compatible = "simple-audio-amplifier";
|
||||
enable-gpios = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
|
||||
sound-name-prefix = "Amplifier";
|
||||
};
|
||||
|
||||
dmic_codec: dmic-codec {
|
||||
compatible = "dmic-codec";
|
||||
num-channels = <2>;
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
dmic-sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "DMIC";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
simple-audio-card,dai-link@0 {
|
||||
format = "pdm";
|
||||
frame-master = <&link0_cpu>;
|
||||
bitclock-master = <&link0_cpu>;
|
||||
|
||||
link0_cpu: cpu {
|
||||
sound-dai = <&dmic>;
|
||||
};
|
||||
|
||||
link0_codec: codec {
|
||||
sound-dai = <&dmic_codec>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* PC1 is repurposed as BT_WAKE_AP */
|
||||
/delete-node/ leds;
|
||||
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
clocks = <&ccu CLK_FANOUT1>;
|
||||
clock-names = "ext_clock";
|
||||
reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
|
||||
assigned-clocks = <&ccu CLK_FANOUT1>;
|
||||
assigned-clock-rates = <32768>;
|
||||
pinctrl-0 = <&clk_pg11_pin>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
};
|
||||
|
||||
&codec {
|
||||
aux-devs = <&audio_amplifier>;
|
||||
routing = "Internal Speaker", "Amplifier OUTL",
|
||||
"Internal Speaker", "Amplifier OUTR",
|
||||
"Amplifier INL", "HPOUTL",
|
||||
"Amplifier INR", "HPOUTR",
|
||||
"LINEINL", "HPOUTL",
|
||||
"LINEINR", "HPOUTR",
|
||||
"MICIN3", "Internal Microphone",
|
||||
"Internal Microphone", "HBIAS";
|
||||
widgets = "Microphone", "Internal Microphone",
|
||||
"Speaker", "Internal Speaker";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dmic {
|
||||
pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&emac {
|
||||
pinctrl-0 = <&rmii_pe_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy-handle = <&ext_rmii_phy>;
|
||||
phy-mode = "rmii";
|
||||
phy-supply = <®_vcc_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
ext_rmii_phy: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
bus-width = <4>;
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_vcc_3v3>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
xr829: wifi@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
clk_pg11_pin: clk-pg11-pin {
|
||||
pins = "PG11";
|
||||
function = "clk";
|
||||
};
|
||||
|
||||
dmic_pb11_d0_pin: dmic-pb11-d0-pin {
|
||||
pins = "PB11";
|
||||
function = "dmic";
|
||||
};
|
||||
|
||||
dmic_pe17_clk_pin: dmic-pe17-clk-pin {
|
||||
pins = "PE17";
|
||||
function = "dmic";
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
uart-has-rtscts;
|
||||
pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
/* XR829 bluetooth is connected here */
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
/* PD20 and PD21 are repurposed for the LCD panel */
|
||||
/delete-property/ usb0_id_det-gpios;
|
||||
/delete-property/ usb0_vbus_det-gpios;
|
||||
usb1_vbus-supply = <®_vcc>;
|
||||
};
|
||||
@ -1,172 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
#include "sun20i-d1-lichee-rv.dts"
|
||||
|
||||
/ {
|
||||
model = "Sipeed Lichee RV Dock";
|
||||
compatible = "sipeed,lichee-rv-dock", "sipeed,lichee-rv",
|
||||
"allwinner,sun20i-d1";
|
||||
|
||||
aliases {
|
||||
ethernet1 = &rtl8723ds;
|
||||
};
|
||||
|
||||
dmic_codec: dmic-codec {
|
||||
compatible = "dmic-codec";
|
||||
num-channels = <2>;
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
dmic-sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "DMIC";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
simple-audio-card,dai-link@0 {
|
||||
format = "pdm";
|
||||
frame-master = <&link0_cpu>;
|
||||
bitclock-master = <&link0_cpu>;
|
||||
|
||||
link0_cpu: cpu {
|
||||
sound-dai = <&dmic>;
|
||||
};
|
||||
|
||||
link0_codec: codec {
|
||||
sound-dai = <&dmic_codec>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_connector: connector {
|
||||
compatible = "hdmi-connector";
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out_connector>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
|
||||
};
|
||||
};
|
||||
|
||||
&codec {
|
||||
routing = "Internal Speaker", "HPOUTL",
|
||||
"Internal Speaker", "HPOUTR",
|
||||
"LINEINL", "HPOUTL",
|
||||
"LINEINR", "HPOUTR",
|
||||
"MICIN3", "Internal Microphone",
|
||||
"Internal Microphone", "HBIAS";
|
||||
widgets = "Microphone", "Internal Microphone",
|
||||
"Speaker", "Internal Speaker";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&de {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dmic {
|
||||
pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_out {
|
||||
hdmi_out_connector: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ledc {
|
||||
pinctrl-0 = <&ledc_pc0_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
multi-led@0 {
|
||||
reg = <0x0>;
|
||||
color = <LED_COLOR_ID_RGB>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
};
|
||||
|
||||
&lradc {
|
||||
status = "okay";
|
||||
|
||||
button-220 {
|
||||
label = "OK";
|
||||
linux,code = <KEY_OK>;
|
||||
channel = <0>;
|
||||
voltage = <220000>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
bus-width = <4>;
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_vcc_3v3>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
rtl8723ds: wifi@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
dmic_pb11_d0_pin: dmic-pb11-d0-pin {
|
||||
pins = "PB11";
|
||||
function = "dmic";
|
||||
};
|
||||
|
||||
dmic_pe17_clk_pin: dmic-pe17-clk-pin {
|
||||
pins = "PE17";
|
||||
function = "dmic";
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
uart-has-rtscts;
|
||||
pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "realtek,rtl8723ds-bt";
|
||||
device-wake-gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG16 */
|
||||
enable-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18 */
|
||||
host-wake-gpios = <&pio 6 17 GPIO_ACTIVE_HIGH>; /* PG17 */
|
||||
};
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
usb1_vbus-supply = <®_vcc>;
|
||||
};
|
||||
@ -1,90 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
#include "sun20i-d1.dtsi"
|
||||
#include "sun20i-d1-common-regulators.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Sipeed Lichee RV";
|
||||
compatible = "sipeed,lichee-rv", "allwinner,sun20i-d1";
|
||||
|
||||
aliases {
|
||||
mmc0 = &mmc0;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-0 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */
|
||||
};
|
||||
};
|
||||
|
||||
reg_vdd_cpu: vdd-cpu {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd-cpu";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
vin-supply = <®_vcc>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <®_vdd_cpu>;
|
||||
};
|
||||
|
||||
&ehci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
broken-cd;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
vmmc-supply = <®_vcc_3v3>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_pb8_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
dr_mode = "otg";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
|
||||
usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
|
||||
usb0_vbus-supply = <®_vcc>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,169 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
#include "sun20i-d1.dtsi"
|
||||
#include "sun20i-d1-common-regulators.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MangoPi MQ Pro";
|
||||
compatible = "widora,mangopi-mq-pro", "allwinner,sun20i-d1";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &rtl8723ds;
|
||||
mmc0 = &mmc0;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
hdmi_connector: connector {
|
||||
compatible = "hdmi-connector";
|
||||
type = "c";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out_connector>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "pwm-leds";
|
||||
|
||||
led {
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
max-brightness = <255>;
|
||||
pwms = <&pwm 2 50000 0>;
|
||||
};
|
||||
};
|
||||
|
||||
reg_avdd2v8: avdd2v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "avdd2v8";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
vin-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
reg_dvdd: dvdd {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "dvdd";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
vin-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
reg_vdd_cpu: vdd-cpu {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd-cpu";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
vin-supply = <®_vcc>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 6 17 GPIO_ACTIVE_LOW>; /* PG17 */
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <®_vdd_cpu>;
|
||||
};
|
||||
|
||||
&de {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_out {
|
||||
hdmi_out_connector: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
|
||||
disable-wp;
|
||||
vmmc-supply = <®_vcc_3v3>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
bus-width = <4>;
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_vcc_3v3>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
rtl8723ds: wifi@1 {
|
||||
reg = <1>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */
|
||||
interrupt-names = "host-wake";
|
||||
};
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
vcc-pe-supply = <®_avdd2v8>;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_pb8_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
uart-has-rtscts;
|
||||
pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "realtek,rtl8723ds-bt";
|
||||
device-wake-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18 */
|
||||
enable-gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG15 */
|
||||
host-wake-gpios = <&pio 6 14 GPIO_ACTIVE_HIGH>; /* PG14 */
|
||||
};
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
usb0_vbus-supply = <®_vcc>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,272 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
#include "sun20i-d1.dtsi"
|
||||
#include "sun20i-d1-common-regulators.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Allwinner D1 Nezha";
|
||||
compatible = "allwinner,d1-nezha", "allwinner,sun20i-d1";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &emac;
|
||||
ethernet1 = &xr829;
|
||||
mmc0 = &mmc0;
|
||||
serial0 = &uart0;
|
||||
spi0 = &spi0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
hdmi_connector: connector {
|
||||
compatible = "hdmi-connector";
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out_connector>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
reg_usbvbus: usbvbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usbvbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
|
||||
enable-active-high;
|
||||
vin-supply = <®_vcc>;
|
||||
};
|
||||
|
||||
reg_vdd_cpu: vdd-cpu {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm 0 50000 0>;
|
||||
pwm-supply = <®_vcc>;
|
||||
regulator-name = "vdd-cpu";
|
||||
regulator-min-microvolt = <810000>;
|
||||
regulator-max-microvolt = <1160000>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
|
||||
};
|
||||
};
|
||||
|
||||
&codec {
|
||||
routing = "Headphone Jack", "HPOUTL",
|
||||
"Headphone Jack", "HPOUTR",
|
||||
"LINEINL", "HPOUTL",
|
||||
"LINEINR", "HPOUTR",
|
||||
"MICIN3", "Headset Microphone",
|
||||
"Headset Microphone", "HBIAS";
|
||||
widgets = "Microphone", "Headset Microphone",
|
||||
"Headphone", "Headphone Jack";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <®_vdd_cpu>;
|
||||
};
|
||||
|
||||
&de {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&emac {
|
||||
pinctrl-0 = <&rgmii_pe_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-supply = <®_vcc_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_out {
|
||||
hdmi_out_connector: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-0 = <&i2c2_pb0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
pcf8574a: gpio@38 {
|
||||
compatible = "nxp,pcf8574a";
|
||||
reg = <0x38>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <1 2 IRQ_TYPE_LEVEL_LOW>; /* PB2 */
|
||||
interrupt-controller;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&ledc {
|
||||
pinctrl-0 = <&ledc_pc0_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
multi-led@0 {
|
||||
reg = <0x0>;
|
||||
color = <LED_COLOR_ID_RGB>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
};
|
||||
|
||||
&lradc {
|
||||
status = "okay";
|
||||
|
||||
button-160 {
|
||||
label = "OK";
|
||||
linux,code = <KEY_OK>;
|
||||
channel = <0>;
|
||||
voltage = <160000>;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
|
||||
disable-wp;
|
||||
vmmc-supply = <®_vcc_3v3>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
bus-width = <4>;
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_vcc_3v3>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
xr829: wifi@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&ohci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-0 = <&pwm0_pd16_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "boot0";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "uboot";
|
||||
reg = <0x00100000 0x00300000>;
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
label = "secure_storage";
|
||||
reg = <0x00400000 0x00100000>;
|
||||
};
|
||||
|
||||
partition@500000 {
|
||||
label = "sys";
|
||||
reg = <0x00500000 0x0fb00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-0 = <&spi1_pd_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_pb8_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
uart-has-rtscts;
|
||||
pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
/* XR829 bluetooth is connected here */
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
dr_mode = "otg";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
|
||||
usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
|
||||
usb0_vbus-supply = <®_usbvbus>;
|
||||
usb1_vbus-supply = <®_vcc>;
|
||||
status = "okay";
|
||||
};
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,68 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
|
||||
#include "binman.dtsi"
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
soc {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
};
|
||||
|
||||
&binman {
|
||||
u-boot-sunxi-with-spl {
|
||||
filename = "u-boot-sunxi-with-spl.bin";
|
||||
pad-byte = <0xff>;
|
||||
|
||||
blob@0 {
|
||||
filename = "spl/sunxi-spl.bin";
|
||||
};
|
||||
|
||||
blob@1 {
|
||||
filename = "u-boot.itb";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ccu {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&mbus {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&mmc0_pins {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&osc24M {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&pio {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&uart0_pb8_pins {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
@ -78,7 +78,6 @@ static inline int __test_and_set_bit(int nr, void *addr)
|
||||
return retval;
|
||||
}
|
||||
|
||||
#define test_and_clear_bit __test_and_clear_bit
|
||||
static inline int __test_and_clear_bit(int nr, void *addr)
|
||||
{
|
||||
int mask, retval;
|
||||
|
||||
@ -85,7 +85,6 @@ static inline u16 readw(const volatile void __iomem *addr)
|
||||
return val;
|
||||
}
|
||||
|
||||
#define readl_relaxed readl
|
||||
static inline u32 readl(const volatile void __iomem *addr)
|
||||
{
|
||||
u32 val;
|
||||
@ -218,7 +217,6 @@ static inline u64 readq(const volatile void __iomem *addr)
|
||||
#define insb(p, d, l) readsb(__io(p), d, l)
|
||||
#define insw(p, d, l) readsw(__io(p), d, l)
|
||||
#define insl(p, d, l) readsl(__io(p), d, l)
|
||||
#endif
|
||||
|
||||
static inline void readsb(unsigned int *addr, void *data, int bytelen)
|
||||
{
|
||||
@ -309,6 +307,7 @@ static inline void writesl(unsigned int *addr, const void *data, int longlen)
|
||||
longlen--;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#define outb_p(val, port) outb((val), (port))
|
||||
#define outw_p(val, port) outw((val), (port))
|
||||
|
||||
@ -23,6 +23,4 @@
|
||||
* no one uses the macros defined in this head file.
|
||||
**************************************************************/
|
||||
|
||||
#define cpu_relax() barrier()
|
||||
|
||||
#endif /* __ASM_RISCV_PROCESSOR_H */
|
||||
|
||||
@ -20,7 +20,7 @@ __weak void flush_dcache_range(unsigned long start, unsigned long end)
|
||||
{
|
||||
}
|
||||
|
||||
__weak void invalidate_icache_range(unsigned long start, unsigned long end)
|
||||
void invalidate_icache_range(unsigned long start, unsigned long end)
|
||||
{
|
||||
/*
|
||||
* RISC-V does not have an instruction for invalidating parts of the
|
||||
|
||||
@ -13,18 +13,8 @@ config BOARD_SUNXI
|
||||
select DM_SERIAL if SERIAL
|
||||
select DM_SPI if SPI
|
||||
select DM_SPI_FLASH if SPI
|
||||
select GENERIC_RISCV if RISCV
|
||||
select OF_BOARD_SETUP
|
||||
select PINCTRL
|
||||
select RAM if SPL_DM
|
||||
select SPL_CLK if SPL_DM
|
||||
select SPL_DM if RISCV && SPL
|
||||
select SPL_DM_SPI if SPL_DM && SPL_SPI
|
||||
select SPL_DM_SPI_FLASH if SPL_DM && SPL_SPI
|
||||
select SPL_OF_CONTROL if SPL_DM
|
||||
select SPL_PINCTRL if SPL_DM
|
||||
select SPL_PINCONF if SPL_DM
|
||||
select SPL_RAM if SPL_DM
|
||||
select SPL_SEPARATE_BSS if SPL
|
||||
select SUPPORT_SPL
|
||||
select SYS_RELOC_GD_ENV_ADDR
|
||||
@ -38,14 +28,12 @@ config BOARD_SUNXI
|
||||
imply DISTRO_DEFAULTS
|
||||
imply FAT_WRITE
|
||||
imply FIT
|
||||
imply MMC
|
||||
imply OF_LIBFDT_OVERLAY
|
||||
imply PRE_CONSOLE_BUFFER
|
||||
imply SPL
|
||||
imply SPL_GPIO
|
||||
imply SPL_LIBCOMMON_SUPPORT
|
||||
imply SPL_LIBGENERIC_SUPPORT
|
||||
imply SPL_LOAD_FIT
|
||||
imply SPL_MMC if MMC
|
||||
imply SPL_POWER
|
||||
imply SPL_SERIAL
|
||||
@ -53,7 +41,6 @@ config BOARD_SUNXI
|
||||
imply SYS_I2C_MVTWSI
|
||||
imply SYS_NS16550
|
||||
imply SYSRESET
|
||||
imply SYSRESET_SBI
|
||||
imply SYSRESET_WATCHDOG
|
||||
imply SYSRESET_WATCHDOG_AUTO
|
||||
imply USB_EHCI_GENERIC
|
||||
@ -80,12 +67,6 @@ config SPL_BSS_START_ADDR
|
||||
default 0x4ff80000 if SUNXI_MINIMUM_DRAM_MB >= 256
|
||||
default 0x43f80000 if SUNXI_MINIMUM_DRAM_MB >= 64
|
||||
|
||||
config SPL_OPENSBI_LOAD_ADDR
|
||||
default 0x40000000 if RISCV
|
||||
|
||||
config SPL_STACK
|
||||
default 0x48000 if TARGET_SUN20I_D1
|
||||
|
||||
config SPL_STACK_R_ADDR
|
||||
default 0x81e00000 if MACH_SUNIV
|
||||
default 0x2fe00000 if MACH_SUN9I
|
||||
@ -94,13 +75,13 @@ config SPL_STACK_R_ADDR
|
||||
|
||||
config SPL_TEXT_BASE
|
||||
default 0x10060 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
|
||||
default 0x20060 if SUN50I_GEN_H6 || TARGET_SUN20I_D1
|
||||
default 0x20060 if SUN50I_GEN_H6
|
||||
default 0x00060
|
||||
|
||||
config SUNXI_MINIMUM_DRAM_MB
|
||||
int
|
||||
default 32 if MACH_SUNIV
|
||||
default 64 if MACH_SUN8I_V3S || TARGET_SUN20I_D1
|
||||
default 64 if MACH_SUN8I_V3S
|
||||
default 256
|
||||
help
|
||||
Minimum DRAM size expected on the board. Traditionally we
|
||||
@ -113,7 +94,7 @@ config SUNXI_MINIMUM_DRAM_MB
|
||||
config SUNXI_SRAM_ADDRESS
|
||||
hex
|
||||
default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
|
||||
default 0x20000 if SUN50I_GEN_H6 || TARGET_SUN20I_D1
|
||||
default 0x20000 if SUN50I_GEN_H6
|
||||
default 0x0
|
||||
help
|
||||
Older Allwinner SoCs have their boot mask ROM mapped just
|
||||
@ -132,7 +113,6 @@ config SYS_CLK_FREQ
|
||||
default 912000000 if MACH_SUN7I
|
||||
default 1008000000 if MACH_SUN8I
|
||||
default 1008000000 if MACH_SUN9I
|
||||
default 1008000000 if TARGET_SUN20I_D1
|
||||
default 816000000 if MACH_SUN50I || MACH_SUN50I_H5
|
||||
default 888000000 if MACH_SUN50I_H6
|
||||
default 1008000000 if MACH_SUN50I_H616
|
||||
@ -145,14 +125,10 @@ config SYS_CONFIG_NAME
|
||||
default "sun7i" if MACH_SUN7I
|
||||
default "sun8i" if MACH_SUN8I
|
||||
default "sun9i" if MACH_SUN9I
|
||||
default "sun20i" if TARGET_SUN20I_D1
|
||||
default "sun50i" if MACH_SUN50I
|
||||
default "sun50i" if MACH_SUN50I_H6
|
||||
default "sun50i" if MACH_SUN50I_H616
|
||||
|
||||
config SYS_CPU
|
||||
default "generic" if TARGET_SUN20I_D1
|
||||
|
||||
config SYS_LOAD_ADDR
|
||||
default 0x81000000 if MACH_SUNIV
|
||||
default 0x22000000 if MACH_SUN9I
|
||||
|
||||
@ -6,8 +6,7 @@
|
||||
#
|
||||
# (C) Copyright 2000-2003
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
obj-$(CONFIG_ARM) += board.o
|
||||
obj-$(CONFIG_RISCV) += board-riscv.o
|
||||
obj-y += board.o
|
||||
obj-$(CONFIG_SUN7I_GMAC) += gmac.o
|
||||
obj-$(CONFIG_MACH_SUN4I) += dram_sun4i_auto.o
|
||||
obj-$(CONFIG_MACH_SUN5I) += dram_sun5i_auto.o
|
||||
|
||||
@ -1,687 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* (C) Copyright 2012-2013 Henrik Nordstrom <henrik@henriknordstrom.net>
|
||||
* (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
|
||||
*
|
||||
* (C) Copyright 2007-2011
|
||||
* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
|
||||
* Tom Cubie <tangliang@allwinnertech.com>
|
||||
*
|
||||
* Some board init for the Allwinner A10-evb board.
|
||||
*/
|
||||
|
||||
#include <dm.h>
|
||||
#include <cpu.h>
|
||||
#include <env.h>
|
||||
#include <env_internal.h>
|
||||
#include <fdt_support.h>
|
||||
#include <generic-phy.h>
|
||||
#include <image.h>
|
||||
#include <init.h>
|
||||
#include <net.h>
|
||||
#include <phy-sun4i-usb.h>
|
||||
#include <ram.h>
|
||||
#include <remoteproc.h>
|
||||
#include <spl.h>
|
||||
#include <status_led.h>
|
||||
#include <sunxi_image.h>
|
||||
#include <u-boot/crc.h>
|
||||
#include <asm/csr.h>
|
||||
#include <asm/global_data.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#ifdef CONFIG_RISCV
|
||||
int board_init(void)
|
||||
{
|
||||
/* https://lore.kernel.org/u-boot/31587574-4cd1-02da-9761-0134ac82b94b@sholland.org/ */
|
||||
return cpu_probe_all();
|
||||
}
|
||||
|
||||
int sunxi_get_sid(unsigned int *sid)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
#define SPL_ADDR CONFIG_SUNXI_SRAM_ADDRESS
|
||||
|
||||
/* The low 8-bits of the 'boot_media' field in the SPL header */
|
||||
#define SUNXI_BOOTED_FROM_MMC0 0
|
||||
#define SUNXI_BOOTED_FROM_NAND 1
|
||||
#define SUNXI_BOOTED_FROM_MMC2 2
|
||||
#define SUNXI_BOOTED_FROM_SPI 3
|
||||
#define SUNXI_BOOTED_FROM_MMC0_HIGH 0x10
|
||||
#define SUNXI_BOOTED_FROM_MMC2_HIGH 0x12
|
||||
|
||||
#define SUNXI_INVALID_BOOT_SOURCE -1
|
||||
|
||||
static int sunxi_egon_valid(struct boot_file_head *egon_head)
|
||||
{
|
||||
return !memcmp(egon_head->magic, BOOT0_MAGIC, 8); /* eGON.BT0 */
|
||||
}
|
||||
|
||||
static int sunxi_toc0_valid(struct toc0_main_info *toc0_info)
|
||||
{
|
||||
return !memcmp(toc0_info->name, TOC0_MAIN_INFO_NAME, 8); /* TOC0.GLH */
|
||||
}
|
||||
|
||||
static int sunxi_get_boot_source(void)
|
||||
{
|
||||
struct boot_file_head *egon_head = (void *)SPL_ADDR;
|
||||
struct toc0_main_info *toc0_info = (void *)SPL_ADDR;
|
||||
|
||||
/*
|
||||
* On the ARMv5 SoCs, the SPL header in SRAM is overwritten by the
|
||||
* exception vectors in U-Boot proper, so we won't find any
|
||||
* information there. Also the FEL stash is only valid in the SPL,
|
||||
* so we can't use that either. So if this is called from U-Boot
|
||||
* proper, just return MMC0 as a placeholder, for now.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_MACH_SUNIV) &&
|
||||
!IS_ENABLED(CONFIG_SPL_BUILD))
|
||||
return SUNXI_BOOTED_FROM_MMC0;
|
||||
|
||||
if (sunxi_egon_valid(egon_head))
|
||||
return readb(&egon_head->boot_media);
|
||||
if (sunxi_toc0_valid(toc0_info))
|
||||
return readb(&toc0_info->platform[0]);
|
||||
|
||||
/* Not a valid image, so we must have been booted via FEL. */
|
||||
return SUNXI_INVALID_BOOT_SOURCE;
|
||||
}
|
||||
|
||||
/* The sunxi internal brom will try to loader external bootloader
|
||||
* from mmc0, nand flash, mmc2.
|
||||
*/
|
||||
uint32_t sunxi_get_boot_device(void)
|
||||
{
|
||||
int boot_source = sunxi_get_boot_source();
|
||||
|
||||
/*
|
||||
* When booting from the SD card or NAND memory, the "eGON.BT0"
|
||||
* signature is expected to be found in memory at the address 0x0004
|
||||
* (see the "mksunxiboot" tool, which generates this header).
|
||||
*
|
||||
* When booting in the FEL mode over USB, this signature is patched in
|
||||
* memory and replaced with something else by the 'fel' tool. This other
|
||||
* signature is selected in such a way, that it can't be present in a
|
||||
* valid bootable SD card image (because the BROM would refuse to
|
||||
* execute the SPL in this case).
|
||||
*
|
||||
* This checks for the signature and if it is not found returns to
|
||||
* the FEL code in the BROM to wait and receive the main u-boot
|
||||
* binary over USB. If it is found, it determines where SPL was
|
||||
* read from.
|
||||
*/
|
||||
switch (boot_source) {
|
||||
case SUNXI_INVALID_BOOT_SOURCE:
|
||||
return BOOT_DEVICE_BOARD;
|
||||
case SUNXI_BOOTED_FROM_MMC0:
|
||||
case SUNXI_BOOTED_FROM_MMC0_HIGH:
|
||||
return BOOT_DEVICE_MMC1;
|
||||
case SUNXI_BOOTED_FROM_NAND:
|
||||
return BOOT_DEVICE_NAND;
|
||||
case SUNXI_BOOTED_FROM_MMC2:
|
||||
case SUNXI_BOOTED_FROM_MMC2_HIGH:
|
||||
return BOOT_DEVICE_MMC2;
|
||||
case SUNXI_BOOTED_FROM_SPI:
|
||||
return BOOT_DEVICE_SPI;
|
||||
}
|
||||
|
||||
panic("Unknown boot source %d\n", boot_source);
|
||||
return -1; /* Never reached */
|
||||
}
|
||||
|
||||
uint32_t sunxi_get_spl_size(void)
|
||||
{
|
||||
struct boot_file_head *egon_head = (void *)SPL_ADDR;
|
||||
struct toc0_main_info *toc0_info = (void *)SPL_ADDR;
|
||||
|
||||
if (sunxi_egon_valid(egon_head))
|
||||
return readl(&egon_head->length);
|
||||
if (sunxi_toc0_valid(toc0_info))
|
||||
return readl(&toc0_info->length);
|
||||
|
||||
/* Not a valid image, so use the default U-Boot offset. */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* The eGON SPL image can be located at 8KB or at 128KB into an SD card or
|
||||
* an eMMC device. The boot source has bit 4 set in the latter case.
|
||||
* By adding 120KB to the normal offset when booting from a "high" location
|
||||
* we can support both cases.
|
||||
* Also U-Boot proper is located at least 32KB after the SPL, but will
|
||||
* immediately follow the SPL if that is bigger than that.
|
||||
*/
|
||||
unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc,
|
||||
unsigned long raw_sect)
|
||||
{
|
||||
unsigned long spl_size = sunxi_get_spl_size();
|
||||
unsigned long sector;
|
||||
|
||||
sector = max(raw_sect, spl_size / 512);
|
||||
|
||||
switch (sunxi_get_boot_source()) {
|
||||
case SUNXI_BOOTED_FROM_MMC0_HIGH:
|
||||
case SUNXI_BOOTED_FROM_MMC2_HIGH:
|
||||
sector += (128 - 8) * 2;
|
||||
break;
|
||||
}
|
||||
|
||||
printf("SPL size = %lu, sector = %lu\n", spl_size, sector);
|
||||
|
||||
return sector;
|
||||
}
|
||||
|
||||
u32 spl_boot_device(void)
|
||||
{
|
||||
return sunxi_get_boot_device();
|
||||
}
|
||||
|
||||
#define CSR_MXSTATUS 0x7c0
|
||||
#define CSR_MHCR 0x7c1
|
||||
#define CSR_MCOR 0x7c2
|
||||
#define CSR_MHINT 0x7c5
|
||||
|
||||
int spl_board_init_f(void)
|
||||
{
|
||||
int ret;
|
||||
struct udevice *dev;
|
||||
|
||||
/* DDR init */
|
||||
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
|
||||
if (ret) {
|
||||
debug("DRAM init failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Initialize extension CSRs. */
|
||||
printf("mxstatus=0x%08lx mhcr=0x%08lx mcor=0x%08lx mhint=0x%08lx\n",
|
||||
csr_read(CSR_MXSTATUS),
|
||||
csr_read(CSR_MHCR),
|
||||
csr_read(CSR_MCOR),
|
||||
csr_read(CSR_MHINT));
|
||||
|
||||
csr_set(CSR_MXSTATUS, 0x638000);
|
||||
csr_write(CSR_MCOR, 0x70013);
|
||||
csr_write(CSR_MHCR, 0x11ff);
|
||||
csr_write(CSR_MHINT, 0x16e30c);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
void spl_perform_fixups(struct spl_image_info *spl_image)
|
||||
{
|
||||
struct ram_info info;
|
||||
struct udevice *dev;
|
||||
int ret;
|
||||
|
||||
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
|
||||
if (ret)
|
||||
panic("No RAM device");
|
||||
|
||||
ret = ram_get_info(dev, &info);
|
||||
if (ret)
|
||||
panic("No RAM info");
|
||||
|
||||
ret = fdt_fixup_memory(spl_image->fdt_addr, info.base, info.size);
|
||||
if (ret)
|
||||
panic("Failed to update DTB");
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/*
|
||||
* Try to use the environment from the boot source first.
|
||||
* For MMC, this means a FAT partition on the boot device (SD or eMMC).
|
||||
* If the raw MMC environment is also enabled, this is tried next.
|
||||
* When booting from NAND we try UBI first, then NAND directly.
|
||||
* SPI flash falls back to FAT (on SD card).
|
||||
*/
|
||||
enum env_location env_get_location(enum env_operation op, int prio)
|
||||
{
|
||||
if (prio > 1)
|
||||
return ENVL_UNKNOWN;
|
||||
|
||||
/* NOWHERE is exclusive, no other option can be defined. */
|
||||
if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE))
|
||||
return ENVL_NOWHERE;
|
||||
|
||||
switch (sunxi_get_boot_device()) {
|
||||
case BOOT_DEVICE_MMC1:
|
||||
case BOOT_DEVICE_MMC2:
|
||||
if (prio == 0 && IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
|
||||
return ENVL_FAT;
|
||||
if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC))
|
||||
return ENVL_MMC;
|
||||
break;
|
||||
case BOOT_DEVICE_NAND:
|
||||
if (prio == 0 && IS_ENABLED(CONFIG_ENV_IS_IN_UBI))
|
||||
return ENVL_UBI;
|
||||
if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND))
|
||||
return ENVL_NAND;
|
||||
break;
|
||||
case BOOT_DEVICE_SPI:
|
||||
if (prio == 0 && IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
|
||||
return ENVL_SPI_FLASH;
|
||||
if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
|
||||
return ENVL_FAT;
|
||||
break;
|
||||
case BOOT_DEVICE_BOARD:
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/*
|
||||
* If we come here for the first time, we *must* return a valid
|
||||
* environment location other than ENVL_UNKNOWN, or the setup sequence
|
||||
* in board_f() will silently hang. This is arguably a bug in
|
||||
* env_init(), but for now pick one environment for which we know for
|
||||
* sure to have a driver for. For all defconfigs this is either FAT
|
||||
* or UBI, or NOWHERE, which is already handled above.
|
||||
*/
|
||||
if (prio == 0) {
|
||||
if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
|
||||
return ENVL_FAT;
|
||||
if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI))
|
||||
return ENVL_UBI;
|
||||
}
|
||||
|
||||
return ENVL_UNKNOWN;
|
||||
}
|
||||
|
||||
/*
|
||||
* On older SoCs the SPL is actually at address zero, so using NULL as
|
||||
* an error value does not work.
|
||||
*/
|
||||
#define INVALID_SPL_HEADER ((void *)~0UL)
|
||||
|
||||
static struct boot_file_head * get_spl_header(uint8_t req_version)
|
||||
{
|
||||
struct boot_file_head *spl = (void *)(ulong)SPL_ADDR;
|
||||
uint8_t spl_header_version = spl->spl_signature[3];
|
||||
|
||||
/* Is there really the SPL header (still) there? */
|
||||
if (memcmp(spl->spl_signature, SPL_SIGNATURE, 3) != 0)
|
||||
return INVALID_SPL_HEADER;
|
||||
|
||||
if (spl_header_version < req_version) {
|
||||
printf("sunxi SPL version mismatch: expected %u, got %u\n",
|
||||
req_version, spl_header_version);
|
||||
return INVALID_SPL_HEADER;
|
||||
}
|
||||
|
||||
return spl;
|
||||
}
|
||||
|
||||
static const char *get_spl_dt_name(void)
|
||||
{
|
||||
struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION);
|
||||
|
||||
/* Check if there is a DT name stored in the SPL header. */
|
||||
if (spl != INVALID_SPL_HEADER && spl->dt_name_offset)
|
||||
return (char *)spl + spl->dt_name_offset;
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
|
||||
int mmc_get_env_dev(void)
|
||||
{
|
||||
switch (sunxi_get_boot_device()) {
|
||||
case BOOT_DEVICE_MMC1:
|
||||
return 0;
|
||||
case BOOT_DEVICE_MMC2:
|
||||
return 1;
|
||||
default:
|
||||
return CONFIG_SYS_MMC_ENV_DEV;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
void sunxi_board_init(void)
|
||||
{
|
||||
#ifdef CONFIG_LED_STATUS
|
||||
if (IS_ENABLED(CONFIG_SPL_DRIVERS_MISC))
|
||||
status_led_init();
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_GADGET
|
||||
int g_dnl_board_usb_cable_connected(void)
|
||||
{
|
||||
struct udevice *dev;
|
||||
struct phy phy;
|
||||
int ret;
|
||||
|
||||
ret = uclass_get_device(UCLASS_USB_GADGET_GENERIC, 0, &dev);
|
||||
if (ret) {
|
||||
pr_err("%s: Cannot find USB device\n", __func__);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = generic_phy_get_by_name(dev, "usb", &phy);
|
||||
if (ret) {
|
||||
pr_err("failed to get %s USB PHY\n", dev->name);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = generic_phy_init(&phy);
|
||||
if (ret) {
|
||||
pr_debug("failed to init %s USB PHY\n", dev->name);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return sun4i_usb_phy_vbus_detect(&phy);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_TAG
|
||||
void get_board_serial(struct tag_serialnr *serialnr)
|
||||
{
|
||||
char *serial_string;
|
||||
unsigned long long serial;
|
||||
|
||||
serial_string = env_get("serial#");
|
||||
|
||||
if (serial_string) {
|
||||
serial = simple_strtoull(serial_string, NULL, 16);
|
||||
|
||||
serialnr->high = (unsigned int) (serial >> 32);
|
||||
serialnr->low = (unsigned int) (serial & 0xffffffff);
|
||||
} else {
|
||||
serialnr->high = 0;
|
||||
serialnr->low = 0;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Check the SPL header for the "sunxi" variant. If found: parse values
|
||||
* that might have been passed by the loader ("fel" utility), and update
|
||||
* the environment accordingly.
|
||||
*/
|
||||
static void parse_spl_header(const uint32_t spl_addr)
|
||||
{
|
||||
struct boot_file_head *spl = get_spl_header(SPL_ENV_HEADER_VERSION);
|
||||
|
||||
if (spl == INVALID_SPL_HEADER)
|
||||
return;
|
||||
|
||||
if (!spl->fel_script_address)
|
||||
return;
|
||||
|
||||
if (spl->fel_uEnv_length != 0) {
|
||||
/*
|
||||
* data is expected in uEnv.txt compatible format, so "env
|
||||
* import -t" the string(s) at fel_script_address right away.
|
||||
*/
|
||||
himport_r(&env_htab, (char *)(uintptr_t)spl->fel_script_address,
|
||||
spl->fel_uEnv_length, '\n', H_NOCLEAR, 0, 0, NULL);
|
||||
return;
|
||||
}
|
||||
/* otherwise assume .scr format (mkimage-type script) */
|
||||
env_set_hex("fel_scriptaddr", spl->fel_script_address);
|
||||
}
|
||||
|
||||
static bool get_unique_sid(unsigned int *sid)
|
||||
{
|
||||
if (sunxi_get_sid(sid) != 0)
|
||||
return false;
|
||||
|
||||
if (!sid[0])
|
||||
return false;
|
||||
|
||||
/*
|
||||
* The single words 1 - 3 of the SID have quite a few bits
|
||||
* which are the same on many models, so we take a crc32
|
||||
* of all 3 words, to get a more unique value.
|
||||
*
|
||||
* Note we only do this on newer SoCs as we cannot change
|
||||
* the algorithm on older SoCs since those have been using
|
||||
* fixed mac-addresses based on only using word 3 for a
|
||||
* long time and changing a fixed mac-address with an
|
||||
* u-boot update is not good.
|
||||
*/
|
||||
#if !defined(CONFIG_MACH_SUN4I) && !defined(CONFIG_MACH_SUN5I) && \
|
||||
!defined(CONFIG_MACH_SUN6I) && !defined(CONFIG_MACH_SUN7I) && \
|
||||
!defined(CONFIG_MACH_SUN8I_A23) && !defined(CONFIG_MACH_SUN8I_A33)
|
||||
sid[3] = crc32(0, (unsigned char *)&sid[1], 12);
|
||||
#endif
|
||||
|
||||
/* Ensure the NIC specific bytes of the mac are not all 0 */
|
||||
if ((sid[3] & 0xffffff) == 0)
|
||||
sid[3] |= 0x800000;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/*
|
||||
* Note this function gets called multiple times.
|
||||
* It must not make any changes to env variables which already exist.
|
||||
*/
|
||||
static void setup_environment(const void *fdt)
|
||||
{
|
||||
char serial_string[17] = { 0 };
|
||||
unsigned int sid[4];
|
||||
uint8_t mac_addr[6];
|
||||
char ethaddr[16];
|
||||
int i;
|
||||
|
||||
if (!get_unique_sid(sid))
|
||||
return;
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
sprintf(ethaddr, "ethernet%d", i);
|
||||
if (!fdt_get_alias(fdt, ethaddr))
|
||||
continue;
|
||||
|
||||
if (i == 0)
|
||||
strcpy(ethaddr, "ethaddr");
|
||||
else
|
||||
sprintf(ethaddr, "eth%daddr", i);
|
||||
|
||||
if (env_get(ethaddr))
|
||||
continue;
|
||||
|
||||
/* Non OUI / registered MAC address */
|
||||
mac_addr[0] = (i << 4) | 0x02;
|
||||
mac_addr[1] = (sid[0] >> 0) & 0xff;
|
||||
mac_addr[2] = (sid[3] >> 24) & 0xff;
|
||||
mac_addr[3] = (sid[3] >> 16) & 0xff;
|
||||
mac_addr[4] = (sid[3] >> 8) & 0xff;
|
||||
mac_addr[5] = (sid[3] >> 0) & 0xff;
|
||||
|
||||
eth_env_set_enetaddr(ethaddr, mac_addr);
|
||||
}
|
||||
|
||||
if (!env_get("serial#")) {
|
||||
snprintf(serial_string, sizeof(serial_string),
|
||||
"%08x%08x", sid[0], sid[3]);
|
||||
|
||||
env_set("serial#", serial_string);
|
||||
}
|
||||
}
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
const char *spl_dt_name;
|
||||
uint boot;
|
||||
|
||||
env_set("fel_booted", NULL);
|
||||
env_set("fel_scriptaddr", NULL);
|
||||
env_set("mmc_bootdev", NULL);
|
||||
|
||||
boot = sunxi_get_boot_device();
|
||||
/* determine if we are running in FEL mode */
|
||||
if (boot == BOOT_DEVICE_BOARD) {
|
||||
env_set("fel_booted", "1");
|
||||
parse_spl_header(SPL_ADDR);
|
||||
/* or if we booted from MMC, and which one */
|
||||
} else if (boot == BOOT_DEVICE_MMC1) {
|
||||
env_set("mmc_bootdev", "0");
|
||||
} else if (boot == BOOT_DEVICE_MMC2) {
|
||||
env_set("mmc_bootdev", "1");
|
||||
}
|
||||
|
||||
/* Set fdtfile to match the FIT configuration chosen in SPL. */
|
||||
spl_dt_name = get_spl_dt_name();
|
||||
if (spl_dt_name) {
|
||||
char *prefix = IS_ENABLED(CONFIG_ARM64) ? "allwinner/" : "";
|
||||
char str[64];
|
||||
|
||||
snprintf(str, sizeof(str), "%s%s.dtb", prefix, spl_dt_name);
|
||||
env_set("fdtfile", str);
|
||||
}
|
||||
|
||||
setup_environment(gd->fdt_blob);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_late_init(void)
|
||||
{
|
||||
#ifdef CONFIG_USB_ETHER
|
||||
usb_ether_init();
|
||||
#endif
|
||||
|
||||
#ifdef SUNXI_SCP_BASE
|
||||
if (!rproc_load(0, SUNXI_SCP_BASE, SUNXI_SCP_MAX_SIZE)) {
|
||||
puts("Starting SCP...\n");
|
||||
rproc_start(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void bluetooth_dt_fixup(void *blob)
|
||||
{
|
||||
/* Some devices ship with a Bluetooth controller default address.
|
||||
* Set a valid address through the device tree.
|
||||
*/
|
||||
uchar tmp[ETH_ALEN], bdaddr[ETH_ALEN];
|
||||
unsigned int sid[4];
|
||||
int i;
|
||||
|
||||
if (!CONFIG_BLUETOOTH_DT_DEVICE_FIXUP[0])
|
||||
return;
|
||||
|
||||
if (eth_env_get_enetaddr("bdaddr", tmp)) {
|
||||
/* Convert between the binary formats of the corresponding stacks */
|
||||
for (i = 0; i < ETH_ALEN; ++i)
|
||||
bdaddr[i] = tmp[ETH_ALEN - i - 1];
|
||||
} else {
|
||||
if (!get_unique_sid(sid))
|
||||
return;
|
||||
|
||||
bdaddr[0] = ((sid[3] >> 0) & 0xff) ^ 1;
|
||||
bdaddr[1] = (sid[3] >> 8) & 0xff;
|
||||
bdaddr[2] = (sid[3] >> 16) & 0xff;
|
||||
bdaddr[3] = (sid[3] >> 24) & 0xff;
|
||||
bdaddr[4] = (sid[0] >> 0) & 0xff;
|
||||
bdaddr[5] = 0x02;
|
||||
}
|
||||
|
||||
do_fixup_by_compat(blob, CONFIG_BLUETOOTH_DT_DEVICE_FIXUP,
|
||||
"local-bd-address", bdaddr, ETH_ALEN, 1);
|
||||
}
|
||||
|
||||
int ft_board_setup(void *blob, struct bd_info *bd)
|
||||
{
|
||||
int __maybe_unused r;
|
||||
|
||||
/*
|
||||
* Call setup_environment and fdt_fixup_ethernet again
|
||||
* in case the boot fdt has ethernet aliases the u-boot
|
||||
* copy does not have.
|
||||
*/
|
||||
setup_environment(blob);
|
||||
fdt_fixup_ethernet(blob);
|
||||
|
||||
bluetooth_dt_fixup(blob);
|
||||
|
||||
#ifdef CONFIG_VIDEO_DT_SIMPLEFB
|
||||
r = sunxi_simplefb_setup(blob);
|
||||
if (r)
|
||||
return r;
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SPL_LOAD_FIT
|
||||
|
||||
static void set_spl_dt_name(const char *name)
|
||||
{
|
||||
struct boot_file_head *spl = get_spl_header(SPL_ENV_HEADER_VERSION);
|
||||
|
||||
if (spl == INVALID_SPL_HEADER)
|
||||
return;
|
||||
|
||||
/* Promote the header version for U-Boot proper, if needed. */
|
||||
if (spl->spl_signature[3] < SPL_DT_HEADER_VERSION)
|
||||
spl->spl_signature[3] = SPL_DT_HEADER_VERSION;
|
||||
|
||||
strcpy((char *)&spl->string_pool, name);
|
||||
spl->dt_name_offset = offsetof(struct boot_file_head, string_pool);
|
||||
}
|
||||
|
||||
int board_fit_config_name_match(const char *name)
|
||||
{
|
||||
const char *best_dt_name = get_spl_dt_name();
|
||||
int ret;
|
||||
|
||||
#ifdef CONFIG_DEFAULT_DEVICE_TREE
|
||||
if (best_dt_name == NULL)
|
||||
best_dt_name = CONFIG_DEFAULT_DEVICE_TREE;
|
||||
#endif
|
||||
|
||||
if (best_dt_name == NULL) {
|
||||
/* No DT name was provided, so accept the first config. */
|
||||
return 0;
|
||||
}
|
||||
#ifdef CONFIG_PINE64_DT_SELECTION
|
||||
if (strstr(best_dt_name, "-pine64-plus")) {
|
||||
/* Differentiate the Pine A64 boards by their DRAM size. */
|
||||
if ((gd->ram_size == 512 * 1024 * 1024))
|
||||
best_dt_name = "sun50i-a64-pine64";
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_PINEPHONE_DT_SELECTION
|
||||
if (strstr(best_dt_name, "-pinephone")) {
|
||||
/* Differentiate the PinePhone revisions by GPIO inputs. */
|
||||
prcm_apb0_enable(PRCM_APB0_GATE_PIO);
|
||||
sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_UP);
|
||||
sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_INPUT);
|
||||
udelay(100);
|
||||
|
||||
/* PL6 is pulled low by the modem on v1.2. */
|
||||
if (gpio_get_value(SUNXI_GPL(6)) == 0)
|
||||
best_dt_name = "sun50i-a64-pinephone-1.2";
|
||||
else
|
||||
best_dt_name = "sun50i-a64-pinephone-1.1";
|
||||
|
||||
sunxi_gpio_set_cfgpin(SUNXI_GPL(6), SUNXI_GPIO_DISABLE);
|
||||
sunxi_gpio_set_pull(SUNXI_GPL(6), SUNXI_GPIO_PULL_DISABLE);
|
||||
prcm_apb0_disable(PRCM_APB0_GATE_PIO);
|
||||
}
|
||||
#endif
|
||||
|
||||
ret = strcmp(name, best_dt_name);
|
||||
|
||||
/*
|
||||
* If one of the FIT configurations matches the most accurate DT name,
|
||||
* update the SPL header to provide that DT name to U-Boot proper.
|
||||
*/
|
||||
if (ret == 0)
|
||||
set_spl_dt_name(best_dt_name);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
@ -78,7 +78,6 @@ config SPL_MAX_SIZE
|
||||
hex "Maximum size of the SPL image, excluding BSS"
|
||||
default 0x37fa0 if MACH_SUN50I_H616
|
||||
default 0x30000 if ARCH_MX6 && MX6_OCRAM_256KB
|
||||
default 0x27fa0 if TARGET_SUN20I_D1
|
||||
default 0x25fa0 if MACH_SUN50I_H6
|
||||
default 0x1b000 if AM33XX && !TI_SECURE_DEVICE
|
||||
default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB
|
||||
|
||||
@ -1,13 +0,0 @@
|
||||
CONFIG_RISCV=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="sun20i-d1-nezha"
|
||||
CONFIG_TARGET_SUN20I_D1=y
|
||||
CONFIG_ARCH_RV64I=y
|
||||
CONFIG_RISCV_SMODE=y
|
||||
# CONFIG_SPL_SMP is not set
|
||||
CONFIG_SYS_SPL_MALLOC=y
|
||||
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
# CONFIG_SYS_I2C_MVTWSI is not set
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_SUN8I_EMAC=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
@ -98,7 +98,6 @@ config CLK_SUN8I_H3
|
||||
|
||||
config CLK_SUN20I_D1
|
||||
bool "Clock driver for Allwinner D1"
|
||||
default TARGET_SUN20I_D1
|
||||
help
|
||||
This enables common clock driver support for platforms based
|
||||
on Allwinner D1 SoC.
|
||||
|
||||
@ -18,9 +18,6 @@
|
||||
#include <asm/gpio.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
#include "../../arch/arm/include/asm/arch-sunxi/gpio.h"
|
||||
#include "../../arch/arm/mach-sunxi/pinmux.c"
|
||||
|
||||
#if !CONFIG_IS_ENABLED(DM_GPIO)
|
||||
static int sunxi_gpio_output(u32 pin, u32 val)
|
||||
{
|
||||
|
||||
@ -23,9 +23,9 @@
|
||||
#include <reset.h>
|
||||
#include <asm/gpio.h>
|
||||
#include <asm/io.h>
|
||||
#if !CONFIG_IS_ENABLED(DM_MMC)
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/cpu.h>
|
||||
#if !CONFIG_IS_ENABLED(DM_MMC)
|
||||
#include <asm/arch/mmc.h>
|
||||
#endif
|
||||
#include <linux/delay.h>
|
||||
@ -36,23 +36,6 @@
|
||||
#define CCM_MMC_CTRL_MODE_SEL_NEW 0
|
||||
#endif
|
||||
|
||||
#include "../../arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h"
|
||||
|
||||
unsigned int clock_get_pll6(void)
|
||||
{
|
||||
uint32_t rval = readl((void *)0x2001020);
|
||||
|
||||
int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT) + 1;
|
||||
int m = ((rval >> 1) & 0x1) + 1;
|
||||
int p0 = ((rval >> 16) & 0x7) + 1;
|
||||
/* The register defines PLL6-2X, not plain PLL6 */
|
||||
uint32_t freq = 24000000UL * n / m / p0;
|
||||
|
||||
printf("PLL reg = 0x%08x, freq = %d\n", rval, freq);
|
||||
|
||||
return freq;
|
||||
}
|
||||
|
||||
struct sunxi_mmc_plat {
|
||||
struct mmc_config cfg;
|
||||
struct mmc mmc;
|
||||
@ -77,8 +60,7 @@ static bool sunxi_mmc_can_calibrate(void)
|
||||
return IS_ENABLED(CONFIG_MACH_SUN50I) ||
|
||||
IS_ENABLED(CONFIG_MACH_SUN50I_H5) ||
|
||||
IS_ENABLED(CONFIG_SUN50I_GEN_H6) ||
|
||||
IS_ENABLED(CONFIG_MACH_SUN8I_R40) ||
|
||||
IS_ENABLED(CONFIG_TARGET_SUN20I_D1);
|
||||
IS_ENABLED(CONFIG_MACH_SUN8I_R40);
|
||||
}
|
||||
|
||||
static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
|
||||
@ -212,7 +194,7 @@ static int mmc_config_clock(struct sunxi_mmc_priv *priv, struct mmc *mmc)
|
||||
rval &= ~SUNXI_MMC_CLK_DIVIDER_MASK;
|
||||
writel(rval, &priv->reg->clkcr);
|
||||
|
||||
#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_TARGET_SUN20I_D1)
|
||||
#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)
|
||||
/* A64 supports calibration of delays on MMC controller and we
|
||||
* have to set delay of zero before starting calibration.
|
||||
* Allwinner BSP driver sets a delay only in the case of
|
||||
@ -640,8 +622,7 @@ static unsigned get_mclk_offset(void)
|
||||
if (IS_ENABLED(CONFIG_MACH_SUN9I_A80))
|
||||
return 0x410;
|
||||
|
||||
if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) ||
|
||||
IS_ENABLED(CONFIG_TARGET_SUN20I_D1))
|
||||
if (IS_ENABLED(CONFIG_SUN50I_GEN_H6))
|
||||
return 0x830;
|
||||
|
||||
return 0x88;
|
||||
@ -681,7 +662,6 @@ static int sunxi_mmc_probe(struct udevice *dev)
|
||||
return ret;
|
||||
ccu_reg = (u32 *)(uintptr_t)ofnode_get_addr(args.node);
|
||||
|
||||
#define SUNXI_MMC0_BASE 0x4020000
|
||||
priv->mmc_no = ((uintptr_t)priv->reg - SUNXI_MMC0_BASE) / 0x1000;
|
||||
priv->mclkreg = (void *)ccu_reg + get_mclk_offset() + priv->mmc_no * 4;
|
||||
|
||||
@ -723,7 +703,6 @@ static const struct udevice_id sunxi_mmc_ids[] = {
|
||||
{ .compatible = "allwinner,sun7i-a20-mmc" },
|
||||
{ .compatible = "allwinner,sun8i-a83t-emmc" },
|
||||
{ .compatible = "allwinner,sun9i-a80-mmc" },
|
||||
{ .compatible = "allwinner,sun20i-d1-mmc" },
|
||||
{ .compatible = "allwinner,sun50i-a64-mmc" },
|
||||
{ .compatible = "allwinner,sun50i-a64-emmc" },
|
||||
{ .compatible = "allwinner,sun50i-h6-mmc" },
|
||||
|
||||
@ -45,9 +45,11 @@ struct sunxi_mmc {
|
||||
u32 chda; /* 0x90 */
|
||||
u32 cbda; /* 0x94 */
|
||||
u32 res2[26];
|
||||
#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)
|
||||
u32 res3[17];
|
||||
u32 samp_dl;
|
||||
u32 res4[46];
|
||||
#endif
|
||||
u32 fifo; /* 0x100 / 0x200 FIFO access address */
|
||||
};
|
||||
|
||||
|
||||
@ -9,7 +9,6 @@
|
||||
#include <malloc.h>
|
||||
|
||||
#include <asm/gpio.h>
|
||||
#include "../../../arch/arm/include/asm/arch-sunxi/gpio.h"
|
||||
|
||||
extern U_BOOT_DRIVER(gpio_sunxi);
|
||||
|
||||
@ -50,7 +49,7 @@ static const char *sunxi_pinctrl_get_pin_name(struct udevice *dev,
|
||||
uint pin_selector)
|
||||
{
|
||||
const struct sunxi_pinctrl_desc *desc = dev_get_priv(dev);
|
||||
static char pin_name[sizeof("PN31")] __section(".data");
|
||||
static char pin_name[sizeof("PN31")];
|
||||
|
||||
snprintf(pin_name, sizeof(pin_name), "P%c%d",
|
||||
pin_selector / SUNXI_GPIOS_PER_BANK + desc->first_bank + 'A',
|
||||
|
||||
@ -101,4 +101,3 @@ source "drivers/ram/rockchip/Kconfig"
|
||||
source "drivers/ram/sifive/Kconfig"
|
||||
source "drivers/ram/stm32mp1/Kconfig"
|
||||
source "drivers/ram/octeon/Kconfig"
|
||||
source "drivers/ram/sunxi/Kconfig"
|
||||
|
||||
@ -20,6 +20,5 @@ obj-$(CONFIG_K3_DDRSS) += k3-ddrss/
|
||||
obj-$(CONFIG_IMXRT_SDRAM) += imxrt_sdram.o
|
||||
|
||||
obj-$(CONFIG_RAM_SIFIVE) += sifive/
|
||||
obj-$(CONFIG_RAM_SUNXI) += sunxi/
|
||||
|
||||
obj-$(CONFIG_ARCH_OCTEON) += octeon/
|
||||
|
||||
@ -1,6 +0,0 @@
|
||||
config RAM_SUNXI
|
||||
bool "Ram drivers support for sunxi SoCs"
|
||||
depends on RAM && BOARD_SUNXI
|
||||
default y
|
||||
help
|
||||
This enables support for ram drivers of sunxi SoCs.
|
||||
@ -1,3 +0,0 @@
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
obj-$(CONFIG_RAM_SUNXI) += mctl_hal-sun20iw1p1.o
|
||||
@ -1,65 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2007-2013
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
|
||||
* Jerry Wang <wangflord@allwinnertech.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __dram_head_h__
|
||||
#define __dram_head_h__
|
||||
|
||||
struct dram_para_t
|
||||
{
|
||||
//normal configuration
|
||||
unsigned int dram_clk;
|
||||
unsigned int dram_type; //dram_type DDR2: 2 DDR3: 3 LPDDR2: 6 LPDDR3: 7 DDR3L: 31
|
||||
//unsigned int lpddr2_type; //LPDDR2 type S4:0 S2:1 NVM:2
|
||||
unsigned int dram_zq; //do not need
|
||||
unsigned int dram_odt_en;
|
||||
|
||||
//control configuration
|
||||
unsigned int dram_para1;
|
||||
unsigned int dram_para2;
|
||||
|
||||
//timing configuration
|
||||
unsigned int dram_mr0;
|
||||
unsigned int dram_mr1;
|
||||
unsigned int dram_mr2;
|
||||
unsigned int dram_mr3;
|
||||
unsigned int dram_tpr0; //DRAMTMG0
|
||||
unsigned int dram_tpr1; //DRAMTMG1
|
||||
unsigned int dram_tpr2; //DRAMTMG2
|
||||
unsigned int dram_tpr3; //DRAMTMG3
|
||||
unsigned int dram_tpr4; //DRAMTMG4
|
||||
unsigned int dram_tpr5; //DRAMTMG5
|
||||
unsigned int dram_tpr6; //DRAMTMG8
|
||||
//reserved for future use
|
||||
unsigned int dram_tpr7;
|
||||
unsigned int dram_tpr8;
|
||||
unsigned int dram_tpr9;
|
||||
unsigned int dram_tpr10;
|
||||
unsigned int dram_tpr11;
|
||||
unsigned int dram_tpr12;
|
||||
unsigned int dram_tpr13;
|
||||
|
||||
};
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,46 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
/*
|
||||
* dram_para1 bits:
|
||||
* 16-19 = page size
|
||||
* 20-27 = row count
|
||||
* 28 = banks 4 or 8
|
||||
*
|
||||
* dram_para2 bits:
|
||||
* 0 = DQ width
|
||||
* 4 = CS1 control
|
||||
* 8-11 = rank flags? bit 8 = ranks differ in config
|
||||
* 12-13 = rank
|
||||
*/
|
||||
|
||||
/* MC_WORK_MODE bits
|
||||
* 0- 1 = ranks code
|
||||
* 2- 3 = banks, log2 - 2 2 3 2
|
||||
* 4- 7 = row width, log2 - 1 16 11 11
|
||||
* 8-11 = page size, log2 - 3 9 9 13
|
||||
* 12-15 = DQ width (or 12-14?)
|
||||
* 16-18 = dram type (2=DDR2, 3=DDR3, 6=LPDDR2, 7=LPDDR3)
|
||||
* 19 = 2T or 1T
|
||||
* 23-24 = ranks code (again?)
|
||||
*/
|
||||
|
||||
#define DRAM_MR0 ((void*)0x3103030)
|
||||
#define DRAM_MR1 ((void*)0x3103034)
|
||||
#define DRAM_MR2 ((void*)0x3103038)
|
||||
#define DRAM_MR3 ((void*)0x310303c)
|
||||
|
||||
#define DRAMTMG0 ((void*)0x3103058)
|
||||
#define DRAMTMG1 ((void*)0x310305c)
|
||||
#define DRAMTMG2 ((void*)0x3103060)
|
||||
#define DRAMTMG3 ((void*)0x3103064)
|
||||
#define DRAMTMG4 ((void*)0x3103068)
|
||||
#define DRAMTMG5 ((void*)0x310306c)
|
||||
#define DRAMTMG6 ((void*)0x3103070)
|
||||
#define DRAMTMG7 ((void*)0x3103074)
|
||||
#define DRAMTMG8 ((void*)0x3103078)
|
||||
|
||||
#define PITMG0 ((void*)0x3103080)
|
||||
#define PTR3 ((void*)0x3103050)
|
||||
#define PTR4 ((void*)0x3103054)
|
||||
#define RFSHTMG ((void*)0x3103090)
|
||||
#define RFSHCTL1 ((void*)0x3103094)
|
||||
@ -30,7 +30,6 @@
|
||||
#include <asm/global_data.h>
|
||||
#include <dm/device_compat.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/log2.h>
|
||||
|
||||
#include <asm/bitops.h>
|
||||
#include <asm/io.h>
|
||||
@ -86,7 +85,7 @@ DECLARE_GLOBAL_DATA_PTR;
|
||||
#define SUN4I_SPI_DEFAULT_RATE 1000000
|
||||
#define SUN4I_SPI_TIMEOUT_MS 1000
|
||||
|
||||
#define SPI_REG(priv, reg) (void *)((priv)->base + \
|
||||
#define SPI_REG(priv, reg) ((priv)->base + \
|
||||
(priv)->variant->regs[reg])
|
||||
#define SPI_BIT(priv, bit) ((priv)->variant->bits[bit])
|
||||
#define SPI_CS(priv, cs) (((cs) << SPI_BIT(priv, SPI_TCR_CS_SEL)) & \
|
||||
@ -558,10 +557,6 @@ static const struct udevice_id sun4i_spi_ids[] = {
|
||||
.compatible = "allwinner,sun8i-h3-spi",
|
||||
.data = (ulong)&sun8i_h3_spi_variant,
|
||||
},
|
||||
{
|
||||
.compatible = "allwinner,sun50i-r329-spi",
|
||||
.data = (ulong)&sun8i_h3_spi_variant,
|
||||
},
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
|
||||
@ -23,7 +23,7 @@
|
||||
#if !defined(CONFIG_ARM) && !defined(CONFIG_SUPERH) \
|
||||
&& !defined(CONFIG_PPC32) \
|
||||
&& !defined(CONFIG_PPC64) && !defined(CONFIG_MIPS) \
|
||||
&& !defined(CONFIG_M68K) && !defined(CONFIG_RISCV)
|
||||
&& !defined(CONFIG_M68K)
|
||||
static inline void readsl(const void __iomem *addr, void *buf, int len)
|
||||
{ insl((unsigned long)addr, buf, len); }
|
||||
static inline void readsw(const void __iomem *addr, void *buf, int len)
|
||||
|
||||
@ -23,8 +23,8 @@
|
||||
#include <malloc.h>
|
||||
#include <phy-sun4i-usb.h>
|
||||
#include <reset.h>
|
||||
//#include <asm/arch/cpu.h>
|
||||
//#include <asm/arch/clock.h>
|
||||
#include <asm/arch/cpu.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <dm/device_compat.h>
|
||||
#include <dm/lists.h>
|
||||
#include <dm/root.h>
|
||||
@ -174,7 +174,6 @@ static void USBC_ForceVbusValidToHigh(__iomem void *base)
|
||||
|
||||
static void USBC_ConfigFIFO_Base(void)
|
||||
{
|
||||
#if 0
|
||||
u32 reg_value;
|
||||
|
||||
/* config usb fifo, 8kb mode */
|
||||
@ -182,7 +181,6 @@ static void USBC_ConfigFIFO_Base(void)
|
||||
reg_value &= ~(0x03 << 0);
|
||||
reg_value |= BIT(0);
|
||||
writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
|
||||
#endif
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
|
||||
@ -1,11 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Placeholder wrapper to allow addressing Allwinner D1 (and later) sun20i
|
||||
* CPU based devices separately. Please do not add anything in here.
|
||||
*/
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#include <configs/sunxi-common.h>
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
@ -12,6 +12,7 @@
|
||||
#ifndef _SUNXI_COMMON_CONFIG_H
|
||||
#define _SUNXI_COMMON_CONFIG_H
|
||||
|
||||
#include <asm/arch/cpu.h>
|
||||
#include <linux/stringify.h>
|
||||
|
||||
/* Serial & console */
|
||||
|
||||
@ -1,19 +0,0 @@
|
||||
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
|
||||
/*
|
||||
* Copyright (C) 2021 Samuel Holland <samuel@sholland.org>
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_CLK_SUN20I_D1_R_CCU_H_
|
||||
#define _DT_BINDINGS_CLK_SUN20I_D1_R_CCU_H_
|
||||
|
||||
#define CLK_R_AHB 0
|
||||
|
||||
#define CLK_BUS_R_TIMER 2
|
||||
#define CLK_BUS_R_TWD 3
|
||||
#define CLK_BUS_R_PPU 4
|
||||
#define CLK_R_IR_RX 5
|
||||
#define CLK_BUS_R_IR_RX 6
|
||||
#define CLK_BUS_R_RTC 7
|
||||
#define CLK_BUS_R_CPUCFG 8
|
||||
|
||||
#endif /* _DT_BINDINGS_CLK_SUN20I_D1_R_CCU_H_ */
|
||||
@ -1,16 +0,0 @@
|
||||
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
|
||||
/*
|
||||
* Copyright (C) 2021 Samuel Holland <samuel@sholland.org>
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_RST_SUN20I_D1_R_CCU_H_
|
||||
#define _DT_BINDINGS_RST_SUN20I_D1_R_CCU_H_
|
||||
|
||||
#define RST_BUS_R_TIMER 0
|
||||
#define RST_BUS_R_TWD 1
|
||||
#define RST_BUS_R_PPU 2
|
||||
#define RST_BUS_R_IR_RX 3
|
||||
#define RST_BUS_R_RTC 4
|
||||
#define RST_BUS_R_CPUCFG 5
|
||||
|
||||
#endif /* _DT_BINDINGS_RST_SUN20I_D1_R_CCU_H_ */
|
||||
Loading…
x
Reference in New Issue
Block a user