/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */

#ifndef _DT_BINDINGS_CLOCK_BL808_MM_GLB_H_
#define _DT_BINDINGS_CLOCK_BL808_MM_GLB_H_

#define CLK_MM_UART		0
#define CLK_MM_I2C		1
#define CLK_MM_SPI		2
#define CLK_MM_MUXPLL		3
#define CLK_MM_XCLK		4
#define CLK_MM_CPU		5
#define CLK_MM_BCLK1X		6
#define CLK_MM_BCLK2X		7
#define CLK_MM_CNN		8
#define CLK_MM_DSP		9
#define CLK_MM_DSP_DP		10
#define CLK_MM_H264		11
#define CLK_MM_IC20		12
#define CLK_MM_UART0		13
#define CLK_MM_SPI0		14
#define CLK_MM_I2C1		15
#define CLK_MM_UART1		16

#endif /* _DT_BINDINGS_CLOCK_BL808_MM_GLB_H_ */