smaeul-u-boot/arch/arm/dts/sun50i-a64-pine64.dts
Samuel Holland 0ee3b2a2df ARM: dts: sun50i: A64: Sync from Linux v5.15
Copy the devicetree source for the A64 SoC and all existing boards
verbatim from the Linux v5.15 tag.

As with the other SoCs, updates of note are EMAC phy-mode changes to set
RGMII delays.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:04 -06:00

321 lines
5.2 KiB
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2016 ARM Ltd.
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Pine64";
compatible = "pine64,pine64", "allwinner,sun50i-a64";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
};
&codec {
status = "okay";
};
&codec_analog {
cpvdd-supply = <&reg_eldo1>;
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&dai {
status = "okay";
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rmii_pins>;
phy-mode = "rmii";
phy-handle = <&ext_rmii_phy1>;
phy-supply = <&reg_dc1sw>;
status = "okay";
};
&hdmi {
hvcc-supply = <&reg_dldo1>;
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&i2c1 {
status = "okay";
};
&i2c1_pins {
bias-pull-up;
};
&mdio {
ext_rmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
disable-wp;
bus-width = <4>;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
};
};
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dc1sw {
regulator-name = "vcc-phy";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1040000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
/*
* The DRAM chips used by Pine64 boards are DDR3L-compatible, so they can
* work at 1.35V with less power consumption.
* As AXP803 DCDC5 cannot reach 1.35V accurately, use 1.36V instead.
*/
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1360000>;
regulator-max-microvolt = <1360000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-mipi";
};
&reg_dldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&reg_eldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
/*
* The A64 chip cannot work without this regulator off, although
* it seems to be only driving the AR100 core.
* Maybe we don't still know well about CPUs domain.
*/
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&simplefb_hdmi {
vcc-hdmi-supply = <&reg_dldo1>;
};
&sound {
simple-audio-card,aux-devs = <&codec_analog>;
simple-audio-card,widgets = "Microphone", "Microphone Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Left DAC", "DACL",
"Right DAC", "DACR",
"Headphone Jack", "HP",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"MIC2", "Microphone Jack";
status = "okay";
};
/* On Euler connector */
&spdif {
status = "disabled";
};
/* On Exp and Euler connectors */
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
/* On Wifi/BT connector, with RTS/CTS */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
status = "disabled";
};
/* On Pi-2 connector */
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
/* On Euler connector */
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "disabled";
};
/* On Euler connector, RTS/CTS optional */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "disabled";
};
&usb_otg {
dr_mode = "host";
status = "okay";
};
&usbphy {
status = "okay";
};