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644398beb8
Copy the devicetree source for the H2+/H3 SoCs and all existing boards verbatim from the Linux v5.15 tag. As with the other SoCs, updates of note are EMAC phy-mode changes to set RGMII delays. Signed-off-by: Samuel Holland <samuel@sholland.org>
43 lines
847 B
Plaintext
43 lines
847 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
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*/
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#include "sunxi-bananapi-m2-plus.dtsi"
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/ {
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/*
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* Bananapi M2+ v1.2 uses a GPIO line to change the effective
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* resistance on the CPU regulator's feedback pin.
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*/
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reg_vdd_cpux: vdd-cpux {
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compatible = "regulator-gpio";
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regulator-name = "vdd-cpux";
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regulator-type = "voltage";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1108475>;
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regulator-max-microvolt = <1308475>;
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regulator-ramp-delay = <50>; /* 4ms */
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gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
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gpios-states = <0x1>;
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states = <1108475 0>, <1308475 1>;
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};
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};
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&cpu0 {
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cpu-supply = <®_vdd_cpux>;
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};
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&cpu1 {
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cpu-supply = <®_vdd_cpux>;
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};
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&cpu2 {
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cpu-supply = <®_vdd_cpux>;
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};
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&cpu3 {
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cpu-supply = <®_vdd_cpux>;
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};
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