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All uniphier v7 SoCs have cortex-a9 and use cortex-a9 global timer in a simple implementation. Now DM_TIMER of it is available on 35751c7f3f ("timer: sti: convert sti-timer to arm a9 global timer"), so let's switch to it. The old driver reads the lower 32bits of counter field and sets the prescaler as 50 with PERIPHCLK(=50MHz), so the global timer works as a 32-bit 1MHz timer. The DM_TIMER uses the whole 64bits with no prescaler, so the global timer works as a 64-bit PERIPHCLK timer. CONFIG_SYS_HZ_CLOCK is set as the default PERIPHCLK frequency, if there is no 'clocks' property in devicetree. Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
50 lines
554 B
Plaintext
50 lines
554 B
Plaintext
/ {
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soc {
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u-boot,dm-pre-reloc;
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timer@60000200 {
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u-boot,dm-pre-reloc;
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};
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serial@54006800 {
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u-boot,dm-pre-reloc;
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};
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serial@54006900 {
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u-boot,dm-pre-reloc;
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};
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serial@54006a00 {
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u-boot,dm-pre-reloc;
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};
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soc-glue@5f800000 {
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u-boot,dm-pre-reloc;
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pinctrl {
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u-boot,dm-pre-reloc;
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emmc {
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u-boot,dm-pre-reloc;
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};
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uart0 {
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u-boot,dm-pre-reloc;
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};
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uart1 {
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u-boot,dm-pre-reloc;
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};
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uart2 {
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u-boot,dm-pre-reloc;
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};
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};
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};
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};
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};
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&emmc {
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u-boot,dm-pre-reloc;
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};
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