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Print the parent name, rate, and bit field values for each clock. Signed-off-by: Samuel Holland <samuel@sholland.org>
398 lines
9.2 KiB
C
398 lines
9.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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#include <clk-uclass.h>
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#include <dm.h>
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#include <asm/io.h>
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#include <clk/bflb.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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extern U_BOOT_DRIVER(bflb_reset);
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static struct clk *
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bflb_clk_get_current_parent(const struct clk *clk)
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{
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struct clk *current_parents = dev_get_priv(clk->dev);
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return ¤t_parents[clk->id];
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}
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static const struct bflb_clk_data *
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bflb_clk_get_data(const struct bflb_clk_plat *plat, const struct clk *clk)
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{
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const struct bflb_clk_desc *desc = plat->desc;
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if (clk->id >= desc->num_clks)
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return NULL;
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return &desc->clks[clk->id];
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}
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static int bflb_clk_request(struct clk *clk)
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{
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const struct bflb_clk_plat *plat = dev_get_plat(clk->dev);
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return bflb_clk_get_data(plat, clk) ? 0 : -EINVAL;
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}
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static u32 bflb_clk_count_parents(const struct bflb_clk_data *data)
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{
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if (!data->sel_mask)
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return 1;
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return data->sel_mask / (data->sel_mask & -data->sel_mask) + 1;
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}
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static int bflb_clk_resolve_parent(struct udevice *dev,
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const struct bflb_clk_data *data,
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u32 sel, struct clk *out)
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{
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const struct bflb_clk_plat *plat = dev_get_plat(dev);
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struct clk parent = {};
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u8 id;
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if (!data->parents)
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return -ENOENT;
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id = data->parents[sel];
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if (id == NO_PARENT) {
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return -ENOENT;
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} else if (id < FW_PARENT_BASE) {
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parent.dev = dev;
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parent.id = id;
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} else if (id < FW_PARENT_BASE + plat->desc->num_fw_parents) {
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const char *name = plat->desc->fw_parents[id - FW_PARENT_BASE];
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int ret;
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ret = clk_get_by_name(dev, name, &parent);
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if (ret)
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return ret;
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} else {
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return -EINVAL;
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}
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*out = parent;
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return 0;
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}
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static ulong bflb_clk_calc_rate(struct clk *clk, ulong req,
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u32 *best_sel, u32 *best_div)
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{
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const struct bflb_clk_plat *plat = dev_get_plat(clk->dev);
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const struct bflb_clk_data *data = bflb_clk_get_data(plat, clk);
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u32 num_sels = bflb_clk_count_parents(data), num_divs = 1;
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ulong best_rate = 0;
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if (data->div_mask) {
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u32 div_lsb = data->div_mask & -data->div_mask;
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num_divs = data->div_mask / div_lsb + 1;
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}
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for (u32 sel = 0; sel < num_sels; ++sel) {
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struct clk parent;
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ulong parent_rate;
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int ret;
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ret = bflb_clk_resolve_parent(clk->dev, data, sel, &parent);
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if (ret)
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continue;
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parent_rate = clk_get_rate(&parent);
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if (IS_ERR_VALUE(parent_rate))
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continue;
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if (data->fixed_div)
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parent_rate /= data->fixed_div;
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for (u32 div = 0; div < num_divs; ++div) {
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ulong rate = parent_rate / (1 + div);
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if (rate > req || rate <= best_rate)
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continue;
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*best_sel = sel;
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*best_div = div;
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best_rate = rate;
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}
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}
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return best_rate;
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}
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static ulong bflb_clk_round_rate(struct clk *clk, ulong req)
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{
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u32 sel, div;
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return bflb_clk_calc_rate(clk, req, &sel, &div);
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}
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static ulong bflb_clk_get_rate(struct clk *clk)
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{
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const struct bflb_clk_plat *plat = dev_get_plat(clk->dev);
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const struct bflb_clk_data *data = bflb_clk_get_data(plat, clk);
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ulong rate;
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if (data->rate)
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return data->rate;
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rate = clk_get_parent_rate(clk);
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if (IS_ERR_VALUE(rate))
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return rate;
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if (data->fixed_div)
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rate /= data->fixed_div;
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if (data->div_mask) {
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u32 div = readl(plat->base + data->div_reg);
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div &= data->div_mask;
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div /= data->div_mask & -data->div_mask;
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rate /= 1 + div;
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}
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return rate;
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}
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static ulong bflb_clk_set_rate(struct clk *clk, ulong req)
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{
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const struct bflb_clk_plat *plat = dev_get_plat(clk->dev);
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const struct bflb_clk_data *data = bflb_clk_get_data(plat, clk);
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u32 sel, div;
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ulong rate;
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rate = bflb_clk_calc_rate(clk, req, &sel, &div);
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if (!rate)
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return rate;
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if (data->sel_mask) {
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u32 sel_lsb = data->sel_mask & -data->sel_mask;
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clrsetbits_le32(plat->base + data->sel_reg,
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data->sel_mask, sel * sel_lsb);
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}
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if (data->div_mask) {
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u32 div_lsb = data->div_mask & -data->div_mask;
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clrsetbits_le32(plat->base + data->div_reg,
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data->div_mask, div * div_lsb);
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}
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return 0;
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}
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static struct clk *bflb_clk_get_parent(struct clk *clk)
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{
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const struct bflb_clk_plat *plat = dev_get_plat(clk->dev);
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const struct bflb_clk_data *data = bflb_clk_get_data(plat, clk);
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struct clk *current_parent = bflb_clk_get_current_parent(clk);
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if (!clk_valid(current_parent)) {
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u32 sel = 0;
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int ret;
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if (data->sel_mask) {
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sel = readl(plat->base + data->sel_reg);
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sel &= data->sel_mask;
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sel /= data->sel_mask & -data->sel_mask;
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}
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ret = bflb_clk_resolve_parent(clk->dev, data, sel,
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current_parent);
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if (ret)
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return ERR_PTR(ret);
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}
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return current_parent;
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}
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static int bflb_clk_set_parent(struct clk *clk, struct clk *parent)
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{
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const struct bflb_clk_plat *plat = dev_get_plat(clk->dev);
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const struct bflb_clk_data *data = bflb_clk_get_data(plat, clk);
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struct clk *current_parent = bflb_clk_get_current_parent(clk);
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u32 num_sels = bflb_clk_count_parents(data);
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u32 sel, sel_lsb;
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struct clk p;
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int ret;
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/* Find the selector value corresponding to the requested parent. */
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for (sel = 0; sel < num_sels; ++sel) {
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ret = bflb_clk_resolve_parent(clk->dev, data, sel, &p);
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if (!ret && p.dev == parent->dev && p.id == parent->id)
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break;
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}
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if (sel == num_sels)
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return -ENOENT;
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if (data->sel_mask)
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clrsetbits_le32(plat->base + data->sel_reg,
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data->sel_mask, sel * sel_lsb);
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*current_parent = p;
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return 0;
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}
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static int bflb_clk_set_gate(struct clk *clk, bool enable)
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{
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const struct bflb_clk_plat *plat = dev_get_plat(clk->dev);
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const struct bflb_clk_data *data = bflb_clk_get_data(plat, clk);
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clrsetbits_le32(plat->base + data->en_reg,
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data->en_mask, enable ? data->en_mask : 0);
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return 0;
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}
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static int bflb_clk_enable(struct clk *clk)
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{
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return bflb_clk_set_gate(clk, true);
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}
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static int bflb_clk_disable(struct clk *clk)
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{
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return bflb_clk_set_gate(clk, false);
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}
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static void bflb_clk_dump(struct udevice *dev)
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{
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const struct bflb_clk_plat *plat = dev_get_plat(dev);
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const struct bflb_clk_desc *desc = plat->desc;
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struct clk clk, *parent;
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printf(" %s (%s)\n", dev->name, dev_read_string(dev, "compatible"));
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printf("ID NAME PARENT RATE SEL DIV EN\n");
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printf("--+----------------+----------------+----------+---+---+--\n");
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clk.dev = dev;
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for (size_t id = 0; id < desc->num_clks; ++id) {
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const struct bflb_clk_data *data = &desc->clks[id];
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const char *parent_name;
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clk.id = id;
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parent = clk_get_parent(&clk);
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if (IS_ERR(parent))
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parent_name = "(none)";
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else if (parent->dev->driver != dev->driver)
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parent_name = parent->dev->name;
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else {
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const struct bflb_clk_plat *parent_plat;
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const struct bflb_clk_data *parent_data;
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parent_plat = dev_get_plat(parent->dev);
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parent_data = bflb_clk_get_data(parent_plat, parent);
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parent_name = parent_data->name;
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if (!parent_name)
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parent_name = "(null)";
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}
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printf("%2zd %16s %16s %10ld",
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id, data->name, parent_name, clk_get_rate(&clk));
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if (data->sel_mask)
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printf(" %3d",
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(readl(plat->base + data->sel_reg) &
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data->sel_mask) /
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(data->sel_mask & -data->sel_mask));
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else if (data->div_mask || data->en_mask)
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puts(" ");
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if (data->div_mask)
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printf(" %3d",
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(readl(plat->base + data->div_reg) &
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data->div_mask) /
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(data->div_mask & -data->div_mask));
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else if (data->en_mask)
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puts(" ");
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if (data->en_mask)
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printf(" %2d",
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(readl(plat->base + data->en_reg) &
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data->en_mask) /
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(data->en_mask & -data->en_mask));
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puts("\n");
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}
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puts("\n");
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}
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static struct clk_ops bflb_clk_ops = {
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.request = bflb_clk_request,
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.round_rate = bflb_clk_round_rate,
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.get_rate = bflb_clk_get_rate,
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.set_rate = bflb_clk_set_rate,
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.get_parent = bflb_clk_get_parent,
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.set_parent = bflb_clk_set_parent,
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.enable = bflb_clk_enable,
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.disable = bflb_clk_disable,
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.dump = bflb_clk_dump,
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};
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static int bflb_clk_bind(struct udevice *dev)
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{
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if (IS_ENABLED(CONFIG_RESET_BFLB)) {
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device_bind(dev, DM_DRIVER_REF(bflb_reset), "reset",
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dev_get_plat(dev), dev_ofnode(dev), NULL);
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}
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return 0;
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}
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static int bflb_clk_probe(struct udevice *dev)
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{
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const struct bflb_clk_plat *plat = dev_get_plat(dev);
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struct clk *current_parents;
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current_parents = calloc(sizeof(struct clk), plat->desc->num_clks);
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if (!current_parents)
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return -ENOMEM;
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dev_set_priv(dev, current_parents);
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return 0;
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}
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static int bflb_clk_of_to_plat(struct udevice *dev)
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{
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struct bflb_clk_plat *plat = dev_get_plat(dev);
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plat->base = dev_remap_addr(dev);
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if (!plat->base)
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return -ENOMEM;
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plat->desc = (const struct bflb_clk_desc *)dev_get_driver_data(dev);
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if (!plat->desc)
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return -EINVAL;
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return 0;
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}
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extern const struct bflb_clk_desc bl808_glb_clk_desc;
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extern const struct bflb_clk_desc bl808_hbn_clk_desc;
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extern const struct bflb_clk_desc bl808_mm_glb_clk_desc;
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extern const struct bflb_clk_desc bl808_pds_clk_desc;
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static const struct udevice_id bflb_clk_ids[] = {
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{ .compatible = "bflb,bl808-glb-clk",
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.data = (ulong)&bl808_glb_clk_desc },
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{ .compatible = "bflb,bl808-hbn-clk",
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.data = (ulong)&bl808_hbn_clk_desc },
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{ .compatible = "bflb,bl808-mm-glb-clk",
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.data = (ulong)&bl808_mm_glb_clk_desc },
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{ .compatible = "bflb,bl808-pds-clk",
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.data = (ulong)&bl808_pds_clk_desc },
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{ }
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};
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U_BOOT_DRIVER(bflb_clk) = {
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.name = "bflb_clk",
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.id = UCLASS_CLK,
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.of_match = bflb_clk_ids,
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.bind = bflb_clk_bind,
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.probe = bflb_clk_probe,
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.of_to_plat = bflb_clk_of_to_plat,
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.plat_auto = sizeof(struct bflb_clk_plat),
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.ops = &bflb_clk_ops,
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};
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