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e110ca11b3
BL808 contains clocks and resets controlled by registers in several MMIO regions, mostly because each MMIO region is in a separate power domain. Add the descriptions for the known clocks and resets. Signed-off-by: Samuel Holland <samuel@sholland.org>
16 lines
356 B
C
16 lines
356 B
C
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
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#ifndef _DT_BINDINGS_CLOCK_BL808_HBN_H_
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#define _DT_BINDINGS_CLOCK_BL808_HBN_H_
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#define CLK_XCLK 0
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#define CLK_HBN_ROOT 1
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#define CLK_HBN_UART_SEL 2
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#define CLK_F32K 3
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#define CLK_HBN_UART 4
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#define CLK_RC32K 5
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#define CLK_XTAL32K 6
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#define CLK_XTAL 7
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#endif /* _DT_BINDINGS_CLOCK_BL808_HBN_H_ */
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