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e110ca11b3
BL808 contains clocks and resets controlled by registers in several MMIO regions, mostly because each MMIO region is in a separate power domain. Add the descriptions for the known clocks and resets. Signed-off-by: Samuel Holland <samuel@sholland.org>
9 lines
208 B
C
9 lines
208 B
C
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
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#ifndef _DT_BINDINGS_RESET_BL808_MM_GLB_H_
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#define _DT_BINDINGS_RESET_BL808_MM_GLB_H_
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#define RST_MM_CPU 0
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#endif /* _DT_BINDINGS_RESET_BL808_MM_GLB_H_ */
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