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https://github.com/smaeul/u-boot.git
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1487c34efa
Most R-Car Gen3 and Gen4 systems require extalr_clk very early
in the boot process. Currently the extalr_clk { bootph-all } DT
property to indicate this clock should be available early is set
in each SoC U-Boot DT extras file. Deduplicate this assignment to
new common r8a779x-rcar64-u-boot.dtsi file.
Note that R-Car Gen3 R8A77990 E3 and R8A77995 D3 and RZ R8A774C0
do not require extalr_clk early, therefore these SoCs still include
plain r8a779x-u-boot.dtsi in their U-Boot DT extras .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
187 lines
3.1 KiB
Plaintext
187 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source extras for U-Boot on R-Car R8A779G0 SoC
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*
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* Copyright (C) 2021 Renesas Electronics Corp.
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*/
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#include "r8a779x-rcar64-u-boot.dtsi"
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/ {
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binman: binman {
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multiple-images;
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section {
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filename = "flash.bin";
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pad-byte = <0xff>;
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/* Offset 0x0000 set to 0x0000_0000 */
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fill@0 {
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offset = <0x0>;
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size = <0x4>;
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fill-byte = [00];
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};
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/* Offset 0x300c set to 0x0000_0000 */
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fill@300c {
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offset = <0x300c>;
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size = <0x4>;
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fill-byte = [00];
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};
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/* Offset 0x3154 set to 0xeb21_0000 */
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fill@3154 {
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offset = <0x3154>;
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size = <0x2>;
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fill-byte = [00];
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};
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fill@3156 {
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offset = <0x3156>;
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size = <0x1>;
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fill-byte = [21];
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};
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fill@3157 {
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offset = <0x3157>;
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size = <0x1>;
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fill-byte = [eb];
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};
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/* Offset 0x3264 set to 0x0003_b000 */
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fill@3264 {
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offset = <0x3264>;
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size = <0x1>;
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fill-byte = [00];
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};
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fill@3265 {
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offset = <0x3265>;
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size = <0x1>;
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fill-byte = [b0];
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};
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fill@3266 {
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offset = <0x3266>;
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size = <0x1>;
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fill-byte = [03];
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};
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fill@3267 {
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offset = <0x3267>;
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size = <0x1>;
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fill-byte = [00];
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};
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u-boot-spl {
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offset = <0x40000>;
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align-end = <4>;
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};
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u-boot {
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offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
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filename = "u-boot.itb";
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fit {
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description = "U-Boot mainline";
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fit,fdt-list = "of-list";
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#address-cells = <1>;
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images {
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uboot {
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arch = "arm64";
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compression = "none";
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description = "U-Boot (64-bit)";
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type = "standalone";
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/*
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* This is in DRAM. We cannot
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* use TEXT_BASE here because
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* this system uses PIE build
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* and TEXT_BASE=0x0 .
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*/
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entry = <0x44100000>;
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load = <0x44100000>;
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uboot-blob {
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filename = "u-boot-nodtb.bin";
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type = "blob-ext";
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};
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};
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@fdt-SEQ {
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compression = "none";
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description = "NAME";
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type = "flat_dt";
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uboot-fdt-blob {
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filename = "u-boot.dtb";
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type = "blob-ext";
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};
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};
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};
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configurations {
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default = "@config-DEFAULT-SEQ";
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@config-SEQ {
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description = "NAME";
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fdt = "fdt-SEQ";
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firmware = "uboot";
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};
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};
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};
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};
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};
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};
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};
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&cpg {
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bootph-all;
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};
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&hscif0 {
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bootph-all;
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};
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&hscif0_pins {
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bootph-all;
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};
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&pfc {
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bootph-all;
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};
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&rpc {
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bank-width = <2>;
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num-cs = <1>;
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};
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&rst {
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bootph-all;
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};
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&soc {
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apmu@e6170000 { /* Remoteproc */
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compatible = "renesas,r8a779g0-cr52";
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reg = <0 0xe6170000 0 0x80000>;
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power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
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status = "okay";
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};
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ram@e6780000 { /* DBSC5 */
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compatible = "renesas,r8a779g0-dbsc";
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reg = <0 0xe6780000 0 0x80000>;
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power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
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status = "okay";
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bootph-all;
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};
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ram@ffec0000 { /* RT-VRAM */
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compatible = "renesas,r8a779g0-rtvram";
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reg = <0 0xffec0000 0 0xf000>;
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power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
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status = "okay";
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bootph-all;
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};
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};
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