mirror of
https://github.com/smaeul/u-boot.git
synced 2025-09-14 22:16:03 +01:00
1c2ffcd5e6
Implement checkboard() to print current SoC model used by a board, e.g. one of: SoC: RK3582 SoC: RK3588 SoC: RK3588J SoC: RK3588S SoC: RK3588S2 when U-Boot proper is running. U-Boot 2025.01-rc1 (Nov 10 2024 - 00:31:29 +0000) Model: Generic RK3588S/RK3588 SoC: RK3588S2 DRAM: 8 GiB Information about the SoC model and variant is read from OTP. Also update rk3588s-u-boot.dtsi to include OTP in U-Boot pre-reloc phase, where checkboard() is called. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
167 lines
1.8 KiB
Plaintext
167 lines
1.8 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
|
|
*/
|
|
|
|
#include "rockchip-u-boot.dtsi"
|
|
|
|
/ {
|
|
aliases {
|
|
spi5 = &sfc;
|
|
};
|
|
|
|
chosen {
|
|
u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
|
|
};
|
|
|
|
dmc {
|
|
compatible = "rockchip,rk3588-dmc";
|
|
bootph-all;
|
|
};
|
|
|
|
rng: rng@fe378000 {
|
|
compatible = "rockchip,trngv1";
|
|
reg = <0x0 0xfe378000 0x0 0x200>;
|
|
};
|
|
};
|
|
|
|
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
|
|
&binman {
|
|
simple-bin-spi {
|
|
mkimage {
|
|
args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
|
|
offset = <0x8000>;
|
|
};
|
|
};
|
|
};
|
|
#endif
|
|
|
|
&cru {
|
|
bootph-all;
|
|
};
|
|
|
|
&emmc_bus8 {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&emmc_clk {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&emmc_cmd {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&emmc_data_strobe {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&emmc_rstnout {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&ioc {
|
|
bootph-all;
|
|
};
|
|
|
|
&otp {
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&pcfg_pull_down {
|
|
bootph-all;
|
|
};
|
|
|
|
&pcfg_pull_none {
|
|
bootph-all;
|
|
};
|
|
|
|
&pcfg_pull_up {
|
|
bootph-all;
|
|
};
|
|
|
|
&pcfg_pull_up_drv_level_2 {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&php_grf {
|
|
bootph-all;
|
|
};
|
|
|
|
&pinctrl {
|
|
bootph-all;
|
|
};
|
|
|
|
&pmu1grf {
|
|
bootph-all;
|
|
};
|
|
|
|
&scmi {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&scmi_clk {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&sdhci {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
u-boot,spl-fifo-mode;
|
|
};
|
|
|
|
&sdmmc {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
u-boot,spl-fifo-mode;
|
|
};
|
|
|
|
&sdmmc_bus4 {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&sdmmc_clk {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&sdmmc_cmd {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&sdmmc_det {
|
|
bootph-pre-ram;
|
|
bootph-some-ram;
|
|
};
|
|
|
|
&sfc {
|
|
u-boot,spl-sfc-no-dma;
|
|
};
|
|
|
|
&sys_grf {
|
|
bootph-all;
|
|
};
|
|
|
|
&uart2 {
|
|
bootph-all;
|
|
clock-frequency = <24000000>;
|
|
};
|
|
|
|
&uart2m0_xfer {
|
|
bootph-all;
|
|
};
|
|
|
|
&xin24m {
|
|
bootph-all;
|
|
};
|