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https://github.com/smaeul/u-boot.git
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7461d55ca7
This defines a weak tpl_board_init function that can be used for running board/SoC-specific code before the DRAM init happens, similarly to spl_board_init() for SPL. Reviewed-by: Paul Kocialkowski <paulk@sys-base.io> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
89 lines
1.6 KiB
C
89 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019 Rockchip Electronics Co., Ltd
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*/
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#include <bootstage.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <hang.h>
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#include <init.h>
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#include <log.h>
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#include <ram.h>
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#include <spl.h>
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#include <version.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/bootrom.h>
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#include <asm/arch-rockchip/timer.h>
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#include <linux/bitops.h>
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#if CONFIG_IS_ENABLED(BANNER_PRINT)
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#include <timestamp.h>
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#endif
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__weak void tpl_board_init(void)
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{
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}
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void board_init_f(ulong dummy)
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{
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struct udevice *dev;
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int ret;
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#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL)
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/*
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* Debug UART can be used from here if required:
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*
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* debug_uart_init();
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* printch('a');
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* printhex8(0x1234);
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* printascii("string");
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*/
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debug_uart_init();
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#ifdef CONFIG_TPL_BANNER_PRINT
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printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
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U_BOOT_TIME ")\n");
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#endif
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#endif
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/* Init secure timer */
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rockchip_stimer_init();
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ret = spl_early_init();
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if (ret) {
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debug("spl_early_init() failed: %d\n", ret);
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hang();
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}
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/* Init ARM arch timer */
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if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER))
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timer_init();
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tpl_board_init();
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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printf("DRAM init failed: %d\n", ret);
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return;
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}
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}
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int board_return_to_bootrom(struct spl_image_info *spl_image,
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struct spl_boot_device *bootdev)
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{
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int ret;
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bootstage_mark_name(BOOTSTAGE_ID_END_TPL, "end tpl");
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ret = bootstage_stash_default();
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if (ret)
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debug("Failed to stash bootstage: err=%d\n", ret);
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back_to_bootrom(BROM_BOOT_NEXTSTAGE);
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return 0;
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}
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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