Kongyang Liu c21dfcb556 riscv: cache: Implement dcache for cv1800b ...

Add dcache operations invalidate_dcache_range and flush_dcache_range for
cv1800b.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

2024-04-09 11:30:02 +08:00

..

cache.c

riscv: cache: Implement dcache for cv1800b

2024-04-09 11:30:02 +08:00

cpu.c

riscv: cpu: cv1800b: Add support for cv1800b SoC

2024-04-09 11:30:02 +08:00

dram.c

riscv: cpu: cv1800b: Add support for cv1800b SoC

2024-04-09 11:30:02 +08:00

Kconfig

riscv: cpu: cv1800b: Add support for cv1800b SoC

2024-04-09 11:30:02 +08:00

Makefile

riscv: cache: Implement dcache for cv1800b

2024-04-09 11:30:02 +08:00