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AST2700 SoCs integrates a Ibex 32-bits RISC-V core as the boot MCU for the first stage bootloader execution, namely SPL. This patch implements the preliminary base to successfully run SPL on this RV32-based MCU to the console banner message. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
23 lines
298 B
Plaintext
23 lines
298 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/dts-v1/;
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#include "ast2700.dtsi"
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/ {
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chosen {
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stdout-path = &uart12;
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tick-timer = &ast_ibex_timer;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x80000000 0x40000000>;
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};
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};
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&uart12 {
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status = "okay";
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clock-frequency = <1846153>;
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};
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