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Add initial dts for K230-CanMV powered by Canaan Kendryte K230 SoC, which has two RISC-V C908 cores, a big core with vector 1.0 extension and a small core without vector extension. This patch is basically comes from Linux Kernel [1] and it assumes u-boot is running on the big core. Additionally, bootctl and reboot nodes are added to support sysreset [2] and an clk_dummy node is added to satisfy dependencies for usb [3]. Currently, u-boot is booted by the vendor's u-boot-spl. To meet the requirements [4][5] of vendor's u-boot-spl for u-boot, a binman node with mkimage child node is added here, which will compress u-boot.bin with gzip and generate an image named "uboot" in the file u-boot-gz.img. [1] https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=k230-basic [2] https://github.com/kendryte/k230_sdk/blob/v1.8/src/big/rt-smart/kernel/bsp/maix3/board/interdrv/sysctl/sysctl_boot/sysctl_boot.c#L67 [3] https://lore.kernel.org/linux-riscv/tencent_AD84B436C2F31108B66B4739D6E306C5E80A@qq.com/ [4] https://github.com/kendryte/k230_sdk/blob/v1.8/src/little/uboot/board/canaan/common/k230_img.c#L306 [5] https://github.com/kendryte/k230_sdk/blob/v1.8/src/little/uboot/board/canaan/common/k230_img.c#L125 Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
176 lines
4.1 KiB
Plaintext
176 lines
4.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>
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* Copyright (C) 2025 Junhui Liu <junhui.liu@pigmoral.tech>
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "canaan,kendryte-k230";
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <27000000>;
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cpu@0 {
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compatible = "thead,c908", "riscv";
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device_type = "cpu";
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reg = <0>;
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riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zfh_zba_zbb_zbc_zbs_zvfh_svpbmt";
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riscv,isa-base = "rv64i";
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riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
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"zicbop", "zicboz", "zicntr", "zicsr", "zifencei",
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"zihpm", "zfh", "zba", "zbb", "zbc", "zbs", "zvfh",
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"svpbmt";
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riscv,cbom-block-size = <64>;
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riscv,cbop-block-size = <64>;
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riscv,cboz-block-size = <64>;
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mmu-type = "riscv,sv39";
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cpu0_intc: interrupt-controller {
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compatible = "riscv,cpu-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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};
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apb_clk: apb-clk-clock {
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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clock-output-names = "apb_clk";
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#clock-cells = <0>;
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};
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clk_dummy: clock-dummy {
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compatible = "fixed-clock";
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clock-frequency = <0>;
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clock-output-names = "clk_dummy";
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#clock-cells = <0>;
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};
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reboot: syscon-reboot {
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compatible = "syscon-reboot";
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regmap = <&bootctl>;
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offset = <0x60>;
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mask = <0x10001>;
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value = <0x10001>;
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};
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soc {
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compatible = "simple-bus";
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interrupt-parent = <&plic>;
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#address-cells = <2>;
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#size-cells = <2>;
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dma-noncoherent;
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ranges;
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bootctl: syscon@0x91102000 {
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compatible = "syscon";
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reg = <0x0 0x91102000 0x0 0x1000>;
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};
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plic: interrupt-controller@f00000000 {
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compatible = "canaan,k230-plic" ,"thead,c900-plic";
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reg = <0xf 0x00000000 0x0 0x04000000>;
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interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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riscv,ndev = <208>;
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};
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clint: timer@f04000000 {
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compatible = "canaan,k230-clint", "thead,c900-clint";
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reg = <0xf 0x04000000 0x0 0x00010000>;
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interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
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};
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uart0: serial@91400000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x0 0x91400000 0x0 0x1000>;
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clocks = <&apb_clk>;
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interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart1: serial@91401000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x0 0x91401000 0x0 0x1000>;
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clocks = <&apb_clk>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart2: serial@91402000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x0 0x91402000 0x0 0x1000>;
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clocks = <&apb_clk>;
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interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart3: serial@91403000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x0 0x91403000 0x0 0x1000>;
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clocks = <&apb_clk>;
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interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart4: serial@91404000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x0 0x91404000 0x0 0x1000>;
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clocks = <&apb_clk>;
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interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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};
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usb0: usb@91500000 {
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compatible = "canaan,k230-otg", "snps,dwc2";
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reg = <0x0 0x91500000 0x0 0x40000>;
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interrupts = <173 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_dummy>;
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clock-names = "otg";
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g-rx-fifo-size = <512>;
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g-np-tx-fifo-size = <64>;
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g-tx-fifo-size = <512 1024 64 64 64 64>;
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status = "disabled";
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};
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usb1: usb@91540000 {
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compatible = "canaan,k230-otg", "snps,dwc2";
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reg = <0x0 0x91540000 0x0 0x40000>;
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interrupts = <174 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_dummy>;
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clock-names = "otg";
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g-rx-fifo-size = <512>;
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g-np-tx-fifo-size = <64>;
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g-tx-fifo-size = <512 1024 64 64 64 64>;
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status = "disabled";
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};
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};
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};
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