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AST2700 SoCs integrates a Ibex 32-bits RISC-V core as the boot MCU for the first stage bootloader execution, namely SPL. This patch implements the preliminary base to successfully run SPL on this RV32-based MCU to the console banner message. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
22 lines
308 B
Plaintext
22 lines
308 B
Plaintext
if TARGET_ASPEED_AST2700_IBEX
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config SYS_BOARD
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default "ibex_ast2700"
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config SYS_VENDOR
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default "aspeed"
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config SYS_CPU
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default "ast2700"
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config SYS_CONFIG_NAME
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default "ibex_ast2700"
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select RISCV_AST2700
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select SUPPORT_SPL
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imply SPL_DRIVERS_MISC
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endif
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