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a5eca322f4
The signal integrity test generates pattern on DDR lines for certification. The signals must be as fast as possible and unidirectional. The test is required from our HW team. The available u-boot memory test doesn't full fill the our requirements. The test is planed to be used in all new siemens boards. Signed-off-by: Enrico Leto <enrico.leto@siemens.com> Signed-off-by: Heiko Schocher <hs@denx.de>
26 lines
370 B
Plaintext
26 lines
370 B
Plaintext
if TARGET_CAPRICORN
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config SYS_BOARD
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default "capricorn"
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config SYS_VENDOR
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default "siemens"
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config SYS_CONFIG_NAME
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default "capricorn-common"
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config IMX_CONFIG
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default "board/siemens/capricorn/imximage.cfg"
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endif
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config SPL_CMT
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bool "Enable Siemens SPL RAM test"
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depends on SPL
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help
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Enable SIemens SPL RAM test.
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source "board/siemens/common/Kconfig"
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