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73d7210791
The STM32_RST line is routed to the ATtiny microcontroller
PA0/RESET/UPDI pin. By driving the PX30 SoC pin as GPIO output high, we
prevent external UPDI to be used for flashing without first putting this
pin as GPIO input, an extra step we could avoid in userspace.
There's an external hardware pull-up strong enough to keep the STM32_RST
state high on ATtiny side but weak enough it can be overridden by
external UPDI. This also means it is safe to use for the STM32 variant,
where STM32_RST line will be in the same state as if output high was
used.
The Q7 standard specifies that MFG_NC1 and MFG_NC2 (used for UPDI for
Ringneck) pins should neither be driven by the carrierboard, nor have
pull-up or pull-down resistors. This means this commit is safe to use
regardless of the carrierboard this module would be connected to
(provided it follows the Q7 standard).
Fixes: 6acdd63e8771 ("rockchip: ringneck-px30: always reset STM32 companion controller on boot")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
67 lines
1.5 KiB
C
67 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2022 Theobroma Systems Design und Consulting GmbH
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*/
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#include <asm/gpio.h>
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#include <linux/delay.h>
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#include "../common/common.h"
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int rockchip_early_misc_init_r(void)
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{
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setup_boottargets();
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return 0;
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}
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#define STM32_RST 100 /* GPIO3_A4 */
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#define STM32_BOOT 101 /* GPIO3_A5 */
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void spl_board_init(void)
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{
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/*
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* Glitches on STM32_BOOT and STM32_RST lines during poweroff or power
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* on may put the STM32 companion microcontroller into DFU mode, let's
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* always reset it into normal mode instead.
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* Toggling the STM32_RST line is safe to do with the ATtiny companion
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* microcontroller variant because it will not trigger an MCU reset
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* since only a UPDI reset command will. Since a UPDI reset is difficult
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* to mistakenly trigger, glitches to the lines are theoretically also
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* incapable of triggering an actual ATtiny reset.
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*/
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int ret;
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ret = gpio_request(STM32_RST, "STM32_RST");
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if (ret) {
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debug("Failed to request STM32_RST\n");
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return;
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}
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ret = gpio_request(STM32_BOOT, "STM32_BOOT");
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if (ret) {
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debug("Failed to request STM32_BOOT\n");
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return;
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}
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/* Rely on HW pull-down for inactive level */
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ret = gpio_direction_input(STM32_BOOT);
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if (ret) {
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debug("Failed to configure STM32_BOOT as input\n");
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return;
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}
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ret = gpio_direction_output(STM32_RST, 0);
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if (ret) {
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debug("Failed to configure STM32_RST as output low\n");
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return;
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}
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mdelay(1);
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ret = gpio_direction_input(STM32_RST);
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if (ret) {
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debug("Failed to configure STM32_RST as input\n");
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return;
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}
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}
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