Michal Simek 9d688e6da5 riscv: mbv: Align DT with QEMU
Align U-Boot with QEMU amd-microblaze-v-virt platform to be able to wire
it with CI.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Padmarao Begari <padmarao.begari@amd.com>
2024-10-29 18:11:49 +08:00

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if TARGET_XILINX_MBV
config SYS_BOARD
default "mbv"
config SYS_VENDOR
default "xilinx"
config SYS_CPU
default "generic"
config TEXT_BASE
default 0x81200000
config SPL_TEXT_BASE
default 0x80000000
config SPL_OPENSBI_LOAD_ADDR
hex
default 0x80200000
config BOARD_SPECIFIC_OPTIONS
def_bool y
select GENERIC_RISCV
select SUPPORT_SPL
imply BOARD_LATE_INIT
imply SPL_RAM_SUPPORT
imply SPL_RAM_DEVICE
imply CMD_SBI
imply CMD_PING
imply OF_HAS_PRIOR_STAGE
source "board/xilinx/Kconfig"
endif