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36278b7051
Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC. Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
65 lines
1.7 KiB
ReStructuredText
65 lines
1.7 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+
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Milk-V Duo
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==========
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CV1800B RISC-V SoC
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------------------
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The CV1800B is a high-performance, low-power 1+1 64-bit RISC-V SoC from Sophgo.
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Mainline support
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----------------
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The support for following drivers are already enabled:
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1. ns16550 UART Driver.
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Building
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~~~~~~~~
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1. Add the RISC-V toolchain to your PATH.
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2. Setup ARCH & cross compilation environment variable:
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.. code-block:: console
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export CROSS_COMPILE=<riscv64 toolchain prefix>
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cd <U-Boot-dir>
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make milkv_duo_defconfig
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make
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This will generate u-boot-dtb.bin
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Booting
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~~~~~~~
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Currently, we rely on vendor FSBL(First Stage Boot Loader) to initialize the
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clock and load the u-boot image, then bootup from it.
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Alternatively, to run u-boot-dtb.bin on top of FSBL, follow these steps:
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1. Use the vendor-provided tool to create a unified fip.bin file containing
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FSBL, OpenSBI, and U-Boot.
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2. Place the generated fip.bin file into the FAT partition of the SD card.
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3. Insert the SD card into the board and power it on.
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The board will automatically execute the FSBL from the fip.bin file.
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Subsequently, it will transition to OpenSBI, and finally, OpenSBI will invoke
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U-Boot.
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Sample boot log from Milk-V Duo board
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. code-block:: none
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U-Boot 2024.01-rc5-00010-g51965baa36 (Dec 28 2023 - 13:15:53 +0800)milkv_duo
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DRAM: 63.3 MiB
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Core: 10 devices, 8 uclasses, devicetree: separate
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Loading Environment from nowhere... OK
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In: serial@4140000
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Out: serial@4140000
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Err: serial@4140000
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Net: No ethernet found.
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milkv_duo# cpu detail
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0: cpu@0 rv64imafdc
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ID = 0, freq = 0 Hz: L1 cache, MMU
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milkv_duo#
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