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[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git Based on what "git diff" suggests, rename a device tree for imx8mm_venice_defconfig and imx8mp_venice_defconfig Signed-off-by: Tom Rini <trini@konsulko.com> --- Cc: Tim Harvey <tharvey@gateworks.com>
243 lines
5.7 KiB
YAML
243 lines
5.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019 Analog Devices Inc.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/adi,ad7192.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices AD7192 ADC device driver
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maintainers:
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- Michael Hennerich <michael.hennerich@analog.com>
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description: |
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Bindings for the Analog Devices AD7192 ADC device. Datasheet can be
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found here:
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https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf
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properties:
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compatible:
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enum:
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- adi,ad7190
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- adi,ad7192
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- adi,ad7193
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- adi,ad7194
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- adi,ad7195
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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reg:
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maxItems: 1
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spi-cpol: true
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spi-cpha: true
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clocks:
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maxItems: 1
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description:
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Optionally, either a crystal can be attached externally between MCLK1 and
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MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2
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pin. If absent, internal 4.92MHz clock is used, which can be made
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available on MCLK2 pin.
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clock-names:
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enum:
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- xtal
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- mclk
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"#clock-cells":
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const: 0
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description:
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If present when internal clock is used, configured as clock provider.
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interrupts:
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maxItems: 1
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aincom-supply:
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description: |
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AINCOM voltage supply. Analog inputs AINx are referenced to this input
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when configured for pseudo-differential operation.
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dvdd-supply:
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description: DVdd voltage supply
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avdd-supply:
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description: AVdd voltage supply
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vref-supply:
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description: VRef voltage supply
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adi,rejection-60-Hz-enable:
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description: |
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This bit enables a notch at 60 Hz when the first notch of the sinc
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filter is at 50 Hz. When REJ60 is set, a filter notch is placed at
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60 Hz when the sinc filter first notch is at 50 Hz. This allows
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simultaneous 50 Hz/ 60 Hz rejection.
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type: boolean
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adi,refin2-pins-enable:
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description: |
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External reference applied between the P1/REFIN2(+) and P0/REFIN2(−) pins.
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type: boolean
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adi,buffer-enable:
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description: |
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Enables the buffer on the analog inputs. If cleared, the analog inputs
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are unbuffered, lowering the power consumption of the device. If this
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bit is set, the analog inputs are buffered, allowing the user to place
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source impedances on the front end without contributing gain errors to
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the system.
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type: boolean
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adi,burnout-currents-enable:
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description: |
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When this bit is set to 1, the 500 nA current sources in the signal
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path are enabled. When BURN = 0, the burnout currents are disabled.
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The burnout currents can be enabled only when the buffer is active
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and when chop is disabled.
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type: boolean
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bipolar:
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description: see Documentation/devicetree/bindings/iio/adc/adc.yaml
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type: boolean
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patternProperties:
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"^channel@[0-9a-f]+$":
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type: object
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$ref: adc.yaml
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unevaluatedProperties: false
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properties:
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reg:
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description: The channel index.
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minimum: 0
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maximum: 271
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diff-channels:
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description:
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Both inputs can be connected to pins AIN1 to AIN16 by choosing the
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appropriate value from 1 to 16.
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items:
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minimum: 1
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maximum: 16
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single-channel:
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description:
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Positive input can be connected to pins AIN1 to AIN16 by choosing the
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appropriate value from 1 to 16. Negative input is connected to AINCOM.
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minimum: 1
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maximum: 16
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oneOf:
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- required:
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- reg
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- diff-channels
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- required:
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- reg
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- single-channel
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required:
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- compatible
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- reg
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- interrupts
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- dvdd-supply
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- avdd-supply
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- vref-supply
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- spi-cpol
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- spi-cpha
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allOf:
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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- if:
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properties:
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compatible:
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enum:
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- adi,ad7190
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- adi,ad7192
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- adi,ad7193
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- adi,ad7195
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then:
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patternProperties:
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"^channel@[0-9a-f]+$": false
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- if:
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anyOf:
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- required:
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- clocks
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- required:
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- clock-names
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then:
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properties:
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"#clock-cells": false
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required:
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,ad7192";
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reg = <0>;
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spi-max-frequency = <1000000>;
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spi-cpol;
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spi-cpha;
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clocks = <&ad7192_mclk>;
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clock-names = "mclk";
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interrupts = <25 0x2>;
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interrupt-parent = <&gpio>;
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aincom-supply = <&aincom>;
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dvdd-supply = <&dvdd>;
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avdd-supply = <&avdd>;
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vref-supply = <&vref>;
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adi,refin2-pins-enable;
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adi,rejection-60-Hz-enable;
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adi,buffer-enable;
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adi,burnout-currents-enable;
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};
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};
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,ad7194";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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spi-max-frequency = <1000000>;
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spi-cpol;
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spi-cpha;
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#clock-cells = <0>;
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interrupts = <25 0x2>;
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interrupt-parent = <&gpio>;
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aincom-supply = <&aincom>;
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dvdd-supply = <&dvdd>;
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avdd-supply = <&avdd>;
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vref-supply = <&vref>;
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channel@0 {
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reg = <0>;
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diff-channels = <1 6>;
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};
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channel@1 {
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reg = <1>;
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single-channel = <1>;
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};
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};
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};
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