mirror of
				https://github.com/smaeul/u-boot.git
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	Sphinx expects Return: and not @return to indicate a return value.
find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;
find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
		
	
			
		
			
				
	
	
		
			69 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			69 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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 * Copyright (C) 2020 Marvell International Ltd.
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 */
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#ifndef __OCTEON_PCI_H__
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#define __OCTEON_PCI_H__
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/**
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 * EEPROM entry struct
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 */
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union octeon_pcie_eeprom {
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	u64 u64;
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	struct octeon_data_s {
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		/**
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		 * 0x9DA1 valid entry, 0x6A5D end of table, 0xffff invalid
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		 * access
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		 */
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		u64 preamble : 16;
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u64: 1; /** Reserved */
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		/** Physical function number accessed by the write operation. */
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		u64 pf : 2;
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		/**
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		 * Specifies bit<31> of the address written by hardware.
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		 * 1 = configuration mask register, 0 = configuration register
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		 */
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		u64 cs2 : 1;
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		/**
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		 * Specifies bits<11:0> of the address written by hardware.
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		 * Bits<30:12> of this address are all 0s.
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		 */
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		u64 address : 12;
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		u64 data : 32;
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	} s;
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};
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void pci_dev_post_init(void);
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int octeon_pci_io_readb(unsigned int reg);
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void octeon_pci_io_writeb(int value, unsigned int reg);
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int octeon_pci_io_readw(unsigned int reg);
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void octeon_pci_io_writew(int value, unsigned int reg);
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int octeon_pci_io_readl(unsigned int reg);
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void octeon_pci_io_writel(int value, unsigned int reg);
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int octeon_pci_mem1_readb(unsigned int reg);
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void octeon_pci_mem1_writeb(int value, unsigned int reg);
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int octeon_pci_mem1_readw(unsigned int reg);
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void octeon_pci_mem1_writew(int value, unsigned int reg);
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int octeon_pci_mem1_readl(unsigned int reg);
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void octeon_pci_mem1_writel(int value, unsigned int reg);
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/* In the TLB mapped case, these also work with virtual addresses,
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** and do the required virt<->phys translations as well. */
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u32 octeon_pci_phys_to_bus(u32 phys);
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u32 octeon_pci_bus_to_phys(u32 bus);
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/**
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 * Searches PCIe EEPROM for override data specified by address and pf.
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 *
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 * @param	address - PCIe config space address
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 * @param	pf	- PCIe config space pf num
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 * @param[out]	id	- override device and vendor ID
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 *
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 * Return:	0 if override found, 1 if not found.
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 */
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int octeon_find_pcie_id_override(unsigned int address, unsigned int pf, u32 *id);
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#endif /* __OCTEON_PCI_H__ */
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