When the CCU binding and driver for the PRCM were written, it seems the
intention was to convert the A31 and A23/A33 devicetrees to use them.
However, that never happened, so those SoCs still use the old binding,
with an MFD for the PRCM, and separate DT nodes for clocks and resets.
The specifier in the legacy clock/reset bindings is the register bit
offset, so the drivers are trivial. Only the outer PRCM node has a reg
property, so the clock/reset drivers use the parent device's MMIO base.
Commit-notes:
I didn't reuse the sunxi gate/reset ops, because the driver is actually
smaller without them. I tested this driver on an A33 tablet.
END
Series-to: Andre Przywara <andre.przywara@arm.com>
Series-to: Jagan Teki <jagan@amarulasolutions.com>
Series-to: Lukasz Majewski <lukma@denx.de>
Series-to: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
1872b7007d