mirror of
https://github.com/smaeul/u-boot.git
synced 2025-09-12 04:56:02 +01:00
e814c64fcb
Due to a bug in the H3 SoC, where the CPU 0 hotplug flag cannot be written, resuming CPU 0 requires using the "Super Standby" code path in the BROM instead of the hotplug path. This path requires jumping to an eGON image in SRAM. Add support to the build system to generate this eGON image and include it in the FIT, and add code to direct the BROM to its location in SRAM. Since the Super Standby code path in the BROM initializes the CPU and AHB1 clocks to 24 MHz, those registers need to be restored after control passes back to U-Boot. Furthermore, because the BROM lowers the AHB1 clock divider to /1 before switching to the lower-frequency parent, PLL_PERIPH0 must be bypassed to prevent AHB1 from temporarily running at 600 MHz. Otherwise, this locks up the SoC. Signed-off-by: Samuel Holland <samuel@sholland.org>
144 lines
2.4 KiB
Plaintext
144 lines
2.4 KiB
Plaintext
#include <config.h>
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#ifdef CONFIG_ARM64
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#define ARCH "arm64"
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#else
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#define ARCH "arm"
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#endif
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/ {
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aliases {
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mmc0 = &mmc0;
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#if CONFIG_MMC_SUNXI_SLOT_EXTRA == 2
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mmc1 = &mmc2;
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#endif
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};
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binman: binman {
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multiple-images;
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};
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};
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/* Let U-Boot be the firmware layer that controls the watchdog. */
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#ifdef CONFIG_MACH_SUN8I_R528
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&wdt {
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status = "okay";
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};
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#endif
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&binman {
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u-boot-sunxi-with-spl {
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filename = "u-boot-sunxi-with-spl.bin";
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pad-byte = <0xff>;
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blob {
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/*
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* This value matches SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
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* and SYS_SPI_U_BOOT_OFFS if those are defined.
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*/
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min-size = <0x8000>;
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filename = "spl/sunxi-spl.bin";
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};
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#ifdef CONFIG_SPL_LOAD_FIT
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fit {
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description = "Configuration to load U-Boot and firmware";
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#address-cells = <1>;
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fit,fdt-list = "of-list";
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images {
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uboot {
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description = "U-Boot";
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type = "standalone";
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os = "u-boot";
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arch = ARCH;
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compression = "none";
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load = <CONFIG_TEXT_BASE>;
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entry = <CONFIG_TEXT_BASE>;
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u-boot-nodtb {
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};
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};
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#if CONFIG_SUNXI_BL31_BASE
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atf {
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description = "ARM Trusted Firmware";
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type = "firmware";
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os = "arm-trusted-firmware";
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arch = ARCH;
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compression = "none";
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load = <CONFIG_SUNXI_BL31_BASE>;
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entry = <CONFIG_SUNXI_BL31_BASE>;
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atf-bl31 {
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filename = "bl31.bin";
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missing-msg = "atf-bl31-sunxi";
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};
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};
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#endif
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#if CONFIG_SUNXI_RESUME_BASE
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resume {
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description = "Super Standby resume image";
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type = "standalone";
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arch = ARCH;
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compression = "none";
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load = <CONFIG_SUNXI_RESUME_BASE>;
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blob-ext {
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filename = "u-boot-resume.img";
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};
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};
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#endif
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#if CONFIG_SUNXI_SCP_BASE
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scp {
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description = "SCP firmware";
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type = "firmware";
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arch = "or1k";
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compression = "none";
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load = <CONFIG_SUNXI_SCP_BASE>;
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scp {
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filename = "scp.bin";
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missing-msg = "scp-sunxi";
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};
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};
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#endif
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@fdt-SEQ {
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description = "NAME";
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type = "flat_dt";
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compression = "none";
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};
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};
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configurations {
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default = "@config-DEFAULT-SEQ";
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@config-SEQ {
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description = "NAME";
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#if CONFIG_SUNXI_BL31_BASE
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firmware = "atf";
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#else
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firmware = "uboot";
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#endif
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loadables =
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#if CONFIG_SUNXI_RESUME_BASE
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"resume",
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#endif
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#if CONFIG_SUNXI_SCP_BASE
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"scp",
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#endif
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"uboot";
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fdt = "fdt-SEQ";
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};
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};
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};
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#else
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u-boot-img {
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};
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#endif
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};
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};
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