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smaeul-u-boot/arch
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Samuel Holland 5e81022e53 riscv: Weakly define invalidate_icache_range() 
Some RISC-V CPUs, such as the T-HEAD XuanTie series, have a
vendor-specific way to invalidate a portion of the instruction cache.
Allow them to override invalidate_icache_range().

Series-to: Rick Chen <rick@andestech.com>
Series-to: Leo <ycliang@andestech.com>
Series-cc: u-boot@lists.denx.de

Signed-off-by: Samuel Holland <samuel@sholland.org>
2023-10-31 00:36:42 -05:00
..
arc
arc: Remove common.h usage
2023-10-24 16:34:45 -04:00
arm
Kconfig: Remove all default n/no options
2023-10-30 15:32:49 -04:00
m68k
Kconfig: Remove all default n/no options
2023-10-30 15:32:49 -04:00
microblaze
microblaze: Remove common.h usage
2023-10-24 16:34:45 -04:00
mips
mips: Remove common.h usage
2023-10-24 16:34:45 -04:00
nios2
event: Convert existing spy records to simple
2023-08-31 13:16:54 -04:00
powerpc
mpc85xx: relocate code in non-SPL build
2023-10-28 09:17:55 -04:00
riscv
riscv: Weakly define invalidate_icache_range()
2023-10-31 00:36:42 -05:00
sandbox
bootX measurements and measurement API moved to u-boot core
2023-10-27 19:27:29 -04:00
sh
spl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN
2023-10-06 14:38:12 -04:00
x86
common: Drop linux/printk.h from common header
2023-09-24 09:54:57 -04:00
xtensa
treewide: unify the linker symbol reference format
2023-08-09 09:21:42 -04:00
.gitignore
…
Kconfig
cmd: mbr: Allow 4 MBR partitions without need for extended
2023-10-24 17:05:24 -04:00
Kconfig.nxp
LFU-544: Kconfig.nxp: Fixed secure boot on LS-CH2 platforms
2023-07-06 13:04:56 +08:00
u-boot-elf.lds
…