mirror of
https://github.com/smaeul/u-boot.git
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65b2650096
This adds a new PSCI implementation which communicates with SCP firmware running on the AR100 using the SCPI protocol. This allows it to support the full set of PSCI v1.1 features, including CPU idle states, system suspend, and multiple reset methods. Signed-off-by: Samuel Holland <samuel@sholland.org>
119 lines
3.0 KiB
Plaintext
119 lines
3.0 KiB
Plaintext
if CPU_V7A
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config CPU_V7_HAS_NONSEC
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bool
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config CPU_V7_HAS_VIRT
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bool
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config ARCH_SUPPORT_PSCI
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bool
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config ARMV7_NONSEC
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bool "Enable support for booting in non-secure mode" if EXPERT
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depends on CPU_V7_HAS_NONSEC
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default y
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---help---
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Say Y here to enable support for booting in non-secure / SVC mode.
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config ARMV7_BOOT_SEC_DEFAULT
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bool "Boot in secure mode by default" if EXPERT
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depends on ARMV7_NONSEC
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default y if ARCH_TEGRA
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---help---
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Say Y here to boot in secure mode by default even if non-secure mode
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is supported. This option is useful to boot kernels which do not
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suppport booting in non-secure mode. Only set this if you need it.
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This can be overridden at run-time by setting the bootm_boot_mode env.
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variable to "sec" or "nonsec".
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config HAS_ARMV7_SECURE_BASE
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bool "Enable support for a ahardware secure memory area"
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default y if ARCH_LS1021A || ARCH_MX7 || ARCH_MX7ULP || ARCH_STM32MP \
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|| MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || TEGRA124
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config ARMV7_SECURE_BASE
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hex "Base address for secure mode memory"
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depends on HAS_ARMV7_SECURE_BASE
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default 0xfff00000 if TEGRA124
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default 0x2ffc0000 if ARCH_STM32MP
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default 0x2f000000 if ARCH_MX7ULP
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default 0x10010000 if ARCH_LS1021A
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default 0x00900000 if ARCH_MX7
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default 0x00044000 if MACH_SUN8I
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default 0x00020000 if MACH_SUN6I || MACH_SUN7I
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config ARMV7_SECURE_RESERVE_SIZE
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hex
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depends on TEGRA124 && HAS_ARMV7_SECURE_BASE
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default 0x100000
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help
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Reserve top 1M for secure RAM
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config ARMV7_SECURE_MAX_SIZE
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hex
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depends on ARMV7_SECURE_BASE && ARCH_STM32MP || MACH_SUN6I \
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|| MACH_SUN7I || MACH_SUN8I
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default 0xbc00 if MACH_SUN8I && !MACH_SUN8I_H3
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default 0x3c00 if MACH_SUN8I && MACH_SUN8I_H3
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default 0x10000
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config ARMV7_VIRT
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bool "Enable support for hardware virtualization" if EXPERT
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depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
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default y
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---help---
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Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
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config ARMV7_PSCI
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bool "Enable PSCI support" if EXPERT
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depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI
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default y
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help
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Say Y here to enable PSCI support.
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choice
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prompt "Supported PSCI version"
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depends on ARMV7_PSCI
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default ARMV7_PSCI_1_1 if ARCH_SUNXI
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default ARMV7_PSCI_1_0
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help
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Select the supported PSCI version.
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config ARMV7_PSCI_1_1
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bool "PSCI V1.1"
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config ARMV7_PSCI_1_0
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bool "PSCI V1.0"
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config ARMV7_PSCI_0_2
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bool "PSCI V0.2"
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config ARMV7_PSCI_0_1
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bool "PSCI V0.1"
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endchoice
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config ARMV7_PSCI_NR_CPUS
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int "Maximum supported CPUs for PSCI"
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depends on ARMV7_NONSEC
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default 4
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help
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The maximum number of CPUs supported in the PSCI firmware.
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It is no problem to set a larger value than the number of
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CPUs in the actual hardware implementation.
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config ARMV7_LPAE
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bool "Use LPAE page table format" if EXPERT
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depends on CPU_V7A
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default y if ARMV7_VIRT
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---help---
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Say Y here to use the long descriptor page table format. This is
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required if U-Boot runs in HYP mode.
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config SPL_ARMV7_SET_CORTEX_SMPEN
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bool
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help
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Enable the ARM Cortex ACTLR.SMP enable bit on SPL startup.
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endif
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