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14d315b8b3
This code was targetting one specific Microblaze platform configuration which is obsolete and fsl bus isn't used in this way. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
120 lines
3.2 KiB
C
120 lines
3.2 KiB
C
/*
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* (C) Copyright 2007 Michal Simek
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*
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* Michal SIMEK <monstr@monstr.eu>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* This is a board specific file. It's OK to include board specific
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* header files */
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#include <common.h>
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#include <config.h>
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#include <netdev.h>
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#include <asm/processor.h>
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#include <asm/microblaze_intc.h>
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#include <asm/asm.h>
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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#ifdef CONFIG_SYS_GPIO_0
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*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) =
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++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)));
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#endif
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#ifdef CONFIG_SYS_RESET_ADDRESS
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puts ("Reseting board\n");
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asm ("bra r0");
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#endif
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return 0;
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}
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int gpio_init (void)
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{
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#ifdef CONFIG_SYS_GPIO_0
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*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0xFFFFFFFF;
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#endif
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return 0;
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}
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void board_init(void)
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{
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gpio_init();
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}
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int board_eth_init(bd_t *bis)
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{
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int ret = 0;
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#ifdef CONFIG_XILINX_AXIEMAC
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ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
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XILINX_AXIDMA_BASEADDR);
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#endif
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#ifdef CONFIG_XILINX_EMACLITE
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u32 txpp = 0;
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u32 rxpp = 0;
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# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
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txpp = 1;
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# endif
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# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
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rxpp = 1;
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# endif
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ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
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txpp, rxpp);
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#endif
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#ifdef CONFIG_XILINX_LL_TEMAC
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# ifdef XILINX_LLTEMAC_BASEADDR
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# ifdef XILINX_LLTEMAC_FIFO_BASEADDR
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ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
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XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR);
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# elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR
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# if XILINX_LLTEMAC_SDMA_USE_DCR == 1
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ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
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XILINX_LL_TEMAC_M_SDMA_DCR,
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XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
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# else
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ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
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XILINX_LL_TEMAC_M_SDMA_PLB,
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XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
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# endif
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# endif
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# endif
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# ifdef XILINX_LLTEMAC_BASEADDR1
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# ifdef XILINX_LLTEMAC_FIFO_BASEADDR1
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ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
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XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1);
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# elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1
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# if XILINX_LLTEMAC_SDMA_USE_DCR == 1
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ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
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XILINX_LL_TEMAC_M_SDMA_DCR,
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XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
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# else
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ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
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XILINX_LL_TEMAC_M_SDMA_PLB,
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XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
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# endif
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# endif
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# endif
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#endif
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return ret;
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}
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